Patents Assigned to Adaptec, Incorporated
  • Patent number: 6516366
    Abstract: A host adapter integrated circuit that contains data transfer modules has a serial port that uses a single serial port pin to communicate with a slave serial port input-output integrated circuit that interfaces to various resources that are included in a support circuit. The serial port forms a packet from each byte of information to be transferred from a module to the slave device by adding a start bit before the byte, followed by a parity bit at the end of the byte and followed by a stop bit. After transmitting the packet, the serial port waits for an acknowledge packet from the slave serial port input-output integrated circuit, for example for two clock cycles after transmission of the packet. For synchronous operation, a common oscillator drives the clock signal on the slave serial port input-output integrated circuit and host adapter integrated circuit.
    Type: Grant
    Filed: May 25, 2000
    Date of Patent: February 4, 2003
    Assignee: Adaptec, Incorporated
    Inventors: Stillman F. Gates, Christopher Burns
  • Patent number: 6381688
    Abstract: A host adapter integrated circuit that contains data transfer modules has a serial port that uses a single serial port pin to communicate with a slave serial port input-output integrated circuit that interfaces to various resources that are included in a support circuit. The serial port forms a packet from each byte of information to be transferred from a module to the slave device by adding a start bit before the byte, followed by a parity bit at the end of the byte and followed by a stop bit. After transmitting the packet, the serial port waits for an acknowledge packet from the slave serial port input-output integrated circuit, for example for two clock cycles after transmission of the packet. For synchronous operation, a common oscillator drives the clock signal on the slave serial port input-output integrated circuit and host adapter integrated circuit.
    Type: Grant
    Filed: May 25, 2000
    Date of Patent: April 30, 2002
    Assignee: Adaptec, Incorporated
    Inventors: Stillman F. Gates, Christopher Burns
  • Patent number: 5812755
    Abstract: A headerless hard disk architecture includes tracks that are grouped into logical zones and physical zones. The physical zones contains tracks which have similar data density and rotational velocity and therefore would have the same track format on a defect-free media. The logical zones are subdivisions of the physical zones and contain tracks similarly affected by defects on a media. A single track format for all of the tracks in a logical zone accounts for defects. A first data structure stored in a data buffer indicates boundaries of data sectors as defined by the track formats for the logical zones. A second data structure in the data buffer indicates which of the data sectors contain defects not accounted for by track formats. A disk controller uses a combination of information from the first and second data structures to identify logical data sectors requested for a data transfer.
    Type: Grant
    Filed: September 1, 1995
    Date of Patent: September 22, 1998
    Assignee: Adaptec, Incorporated
    Inventors: Fred A. Kool, John S. Packer
  • Patent number: 5504868
    Abstract: A hard disk controller integrated circuit of a SCSI target device comprises a dedicated command descriptor block "CDB" parsing state machine. The dedicated CDB parsing state machine parses incoming six-byte, ten-byte and twelve-byte SCSI command descriptor blocks and writes information from corresponding fields in the six-byte, ten-byte and twelve-byte SCSI command descriptor blocks into predetermined memory locations. In some embodiments, there are sixteen such predetermined memory locations which together comprise a 16.times.8 register file. A microprocessor coupled to the hard disk controller integrated circuit is therefore relieved of the burden of parsing incoming SCSI command descriptor blocks.
    Type: Grant
    Filed: March 1, 1994
    Date of Patent: April 2, 1996
    Assignee: Adaptec, Incorporated
    Inventor: Shahe H. Krakirian
  • Patent number: 5195302
    Abstract: A package system for populated circuit boards is disclosed. The circuit board is placed on a piece of conductive paperboard and is shrink wrapped with an antistatic film, which may be provided with a tearstrip. Placed on a cardboard carton, the package provides good protection against physical shocks, vibration and electrostatic discharge.
    Type: Grant
    Filed: October 21, 1991
    Date of Patent: March 23, 1993
    Assignee: Adaptec, Incorporated
    Inventors: Patricio J. Collantes, Jr., Marilyn S. Highland, Sam Kazarian