Patents Assigned to Adavnaced Semiconductor Engineering Inc.
  • Patent number: 7635610
    Abstract: A multi-chip stack package includes a substrate, a first chip, a second chip, a plurality of bumps, a plurality of junction interface bumps, a plurality of conductive wires, a filler material and an encapsulating material. The substrate has a plurality of first contacts and a plurality of second contacts thereon. The first chip is bonded to the substrate surface by the bumps positioned between the active surface of the first chip and the first contacts. The second chip is bonded to the first chip by the junction interface bumps positioned between the back surface of the first chip and the back surface of the second chip. The conductive wires electrically connect the active surface of the second chip and the second contacts. The filler material encloses the bumps and the junction interface bumps. The encapsulating material encloses the first chip, the second chip and the conductive wires.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: December 22, 2009
    Assignee: Adavnaced Semiconductor Engineering Inc.
    Inventor: Jen-Kuang Fang