Abstract: Disclosed herein is a latch circuit capable of preventing an output failure caused due to simultaneous transition of a control signal and an input signal. The latch circuit according to the present invention generates a separate control adjustment signal CTR using the control signal Control and the input signal In and uses the control adjustment signal CTR, instead of the control signal for a latch operation. Accordingly, when the control signal and the input signal transition at the same time, the control adjustment signal is processed not to transition during a transition interval of the input signal, thereby preventing a metastability problem that occurred in the existing latch circuit.