Patents Assigned to Adtran
  • Patent number: 5680422
    Abstract: A wander reduction mechanism in an HDSL pulse-stuffing synchronization system provides a more precise measure of the phase of the incoming asynchronous signal than is obtained in conventional schemes, in which the only information available is the presence or absence of stuffing pulses. An auxiliary phase comparator and phase adjuster are incorporated into the synchronizer-multiplexer to generate a reference data clock (derived from the synchronized data clock), so that the incoming unsynchronized data clock can be tracked. As the clock is iteratively phase-adjusted, the respective changes are accumulated. At the end of a prescribed measurement interval, the net contents of the accumulator are encoded and transported over the synchronous digital data communication channel to the receiver.
    Type: Grant
    Filed: April 27, 1995
    Date of Patent: October 21, 1997
    Assignee: Adtran
    Inventors: Richard A. Burch, Kevin W. Schneider, Michael D. Turner, Timothy D. Rochell
  • Patent number: 5579316
    Abstract: Network bit efficiency for transmitting a limited size data frame over a digital communication system is enhanced by a macro-header encoding mechanism which replaces plural header portions of a data frame sequence with a single macro-header byte. The macro-header may be representative of protocol and signal processing operation fields that would otherwise require a longer overhead sequence as a precursor to data transmission. At the receiver, the macro-code is translated into a predefined sequence of opcodes, parameters and data bytes. Whenever the receiver requires another opcode, parameter or data byte, it initially looks to the macro-code. Otherwise, the necessary byte is obtained from the data frame segment being interpreted.
    Type: Grant
    Filed: May 2, 1994
    Date of Patent: November 26, 1996
    Assignee: Adtran
    Inventors: W. Stuart Venters, Kevin W. Schneider
  • Patent number: 5574723
    Abstract: To remotely interrogate a telecommunications services channel unit resident in any office along a tandem network communication link, a control link establishment code sequence comprised of one or more sets of predefined digital code bytes is transmitted from a test system controller. The format of the control link establishment sequence is such that as it is forwarded down the link, any tandem channel unit or units that are intermediate the test system controller and the destination channel unit will transition to a transparent state, so that only the destination channel unit will be able transition to an interrogation, response mode. During the command-response mode, channel units connected in tandem between the selected channel unit and the interrogating test system controller continue to assume a transparent state, so that command and response messages propagate unmodified through such intermediate channel units.
    Type: Grant
    Filed: September 8, 1994
    Date of Patent: November 12, 1996
    Assignee: Adtran
    Inventors: Stephen T. Killian, Jeffrey B. Wells
  • Patent number: 5561687
    Abstract: The feedforward filter section of a decision feedback equalizer is modified to include one or more postcursor taps, that are sequentially weighted at decreasing binary fractions of the cursor tap. Such a modified feedforward filter section, combined with the placement of a simple anti-aliasing filter upstream of the sampling point, results in an optimum feedforward filter configuration that is not anticausal, and offers a substantially improved performance over conventional DFB equalizer structures. Optimum performance is achieved when such a postcursor filter structure is augmented with an adaptive noise canceler coupled in the DFB path.
    Type: Grant
    Filed: December 15, 1994
    Date of Patent: October 1, 1996
    Assignee: ADTRAN
    Inventor: Michael D. Turner
  • Patent number: 5539785
    Abstract: A jitter/wander reduction circuit is provided for a desynchronizer deriving an output clock signal from an independent clock signal and phase adjustment signals. Phase adjustment signals relate to a deviation of the independent clock signal from an input clock signal. The circuit includes a frequency offset estimation circuit receiving phase adjustment signals and providing a frequency offset estimation signal. A phase controller receives the frequency offset estimation signal, provides a feedback signal to the frequency offset estimation circuit, and provides a phase difference signal. A clock generator circuit receives the independent clock signal and the phase difference signal. The independent clock signal is adjusted based on the phase difference signal to provide an output clock signal.
    Type: Grant
    Filed: July 27, 1994
    Date of Patent: July 23, 1996
    Assignee: Adtran
    Inventors: Richard A. Burch, Kevin W. Schneider, Michael D. Turner
  • Patent number: 5526377
    Abstract: The need to employ costly precision components to reduce non-linearities in the signal processing path of noise reduction circuitry such as an echo canceler and decision feedback equalizer is successfully addressed by a transversal filter which is capable of effectively tracking for non-linearities in system components that manifest themselves as added noise introduced into the signal propagation path. This non-linear tracking capability is attained by employing cascaded sets of weighting coefficient and scaling factor multiplying stages. The first set of weighting coefficients effectively modifies the contents of each of the transmitted symbol samples in the transversal filter delay line to produce respective sets of `partial sums` associated with the respective data symbols employed in the data modulation scheme. The second, cascaded set of `scaling` coefficients or factors is employed to scale selected ones of the sets of the partial sums.
    Type: Grant
    Filed: December 12, 1994
    Date of Patent: June 11, 1996
    Assignee: Adtran
    Inventors: Harry Yedid, Richard A. Burch, Michael D. Turner, Kevin W. Schneider
  • Patent number: 5515371
    Abstract: In a time division multiplexed digital communication network through which time division multiplexed data signals are routed over respectively different transmission paths of the network, the paths having respectively different transmission delays, to a bonding receiver at a destination end of the network, the bonding receiver including a digital signal processor for controlling the operation of the bonding receiver, bonding compensation that is normally carried out entirely by the digital signal processor is transferred from the digital signal processor to an auxiliary delay path, which is coupled to the receive path from the network. The auxiliary delay path is controlled by the direct memory access (DMA) functionality of the digital signal processor to transfer selected data time slots through the auxiliary delay path.
    Type: Grant
    Filed: October 26, 1994
    Date of Patent: May 7, 1996
    Assignee: Adtran
    Inventor: W. Stuart Venters
  • Patent number: 5500879
    Abstract: An apparatus for blind signal separation and equalization of PAM signals on a full duplex transmission line is capable of successfully extracting and recovering the respective signalling components of a full-duplex wireline digital data link without having to disturb the link during its use (e.g. as by interrupting service to sever the link in order to install a line coupling device, such as a modem or attenuator pad to signal monitoring equipment) and without having to generate PN or other training sequences. A full-duplex wireline bridge device comprises a signal characteristic monitoring device that is capable of monitoring the link and providing respective output signals representative of the respective unidirectional signal components being transmitted simultaneously in opposite directions along the link.
    Type: Grant
    Filed: March 16, 1994
    Date of Patent: March 19, 1996
    Assignee: Adtran
    Inventors: Mark A. Webster, Keith R. Baldwin, Richard D. Roberts
  • Patent number: 5479439
    Abstract: An office channel unit data port is modified to incorporate a test tone detector and modified control software, to provide an analog service channel port that is capable of responding to analog test tones sourced from an analog tone-based test service facility, in order to test local and remote communication channels and analog/digital interface equipment. In addition, operation control codes have prescribed function-representative values that do not introduce disturbing `glitches` onto the analog line; instead when converted into analog format they produce respective voltages that effectively correspond to voltage levels expected to be seen by an analog channel, while conforming with the accepted practice of permitting a zero to be used in the LSB position for control code purposes.
    Type: Grant
    Filed: April 16, 1991
    Date of Patent: December 26, 1995
    Assignee: Adtran
    Inventors: Robert E. Bowlin, Lonnie McMillian
  • Patent number: 5473665
    Abstract: Non-intrusive performance monitoring of a DS0 channel between a customer premises interface and a D4 channel bank includes an augmentation of existing channel bank equipment and a digital services communication device terminating the DS0 link at the customer site. An auxiliary signalling and performance monitoring arrangement is remotely accessible by a non-resident control site, thereby enabling the control site to perform prescribed network supervisory tasks with respect to one or more selected DS0 links. Office channel unit data port and line interface components of the channel bank are modified to provide bidirectional signalling capability via the receive segment of the channel bank's internal communications link.
    Type: Grant
    Filed: March 8, 1993
    Date of Patent: December 5, 1995
    Assignee: Adtran
    Inventors: Clifford L. Hall, Norman R. Harris, Stephen T. Killian, Jeffrey B. Wells
  • Patent number: 5450441
    Abstract: To prevent the occurrence of an anomaly on a single data-sourcing slave channel from causing continuous transmission on that channel and thereby tying up the entirety of a multipoint network, a signal transmission quality monitoring mechanism is incorporated into the office channel unit of each data-sourcing channel. The signal transmission quality monitoring mechanism controls the participation of each monitored digital communications channel on the basis of a measure of the quality of digital signals received from each monitored channel. The control software of each slave channel's office channel unit is configured to include a bipolar violation detector which monitors the channel for the presence of errors exhibited as bipolar violations of alternate mark inversion (AMI)-formatted digital signals. In response to the occurrence of a prescribed number of illegal bipolar violations within a predetermined number of received signals (e.g.
    Type: Grant
    Filed: December 14, 1993
    Date of Patent: September 12, 1995
    Assignee: Adtran
    Inventors: Norman R. Harris, Don A. Waring, Clint S. Coleman
  • Patent number: 5414733
    Abstract: The feedforward filter section of a decision feedback equalizer is modified to include one or more postcursor taps, that are sequentially weighted at decreasing binary fractions of the cursor tap. Such a modified feedforward filter section, combined with the placement of a simple anti-aliasing filter upstream of the sampling point, results in an optimum feedforward filter configuration that is not anticausal, and offers a substantially improved performance over conventional DFB equalizer structures. Optimum performance is achieved when such a postcursor filter structure is augmented with an adaptive noise canceler coupled in the DFB path.
    Type: Grant
    Filed: December 20, 1993
    Date of Patent: May 9, 1995
    Assignee: Adtran
    Inventor: Michael D. Turner
  • Patent number: 5396517
    Abstract: The need to employ costly precision components to reduce non-linearities in the signal processing path of noise reduction circuitry such as an echo canceler and decision feedback equalizer is successfully addressed by a transversal filter which is capable of effectively tracking for non-linearities in system components that manifest themselves as added noise introduced into the signal propagation path. This non-linear tracking capability is attained by employing cascaded sets of weighting coefficient and scaling factor multiplying stages. The first set of weighting coefficients effectively modifies the contents of each of the transmitted symbol samples in the transversal filter delay line to produce respective sets of `partial sums` associated with the respective data symbols employed in the data modulation scheme. The second, cascaded set of `scaling` coefficients or factors is employed to scale selected ones of the sets of the partial sums.
    Type: Grant
    Filed: March 4, 1993
    Date of Patent: March 7, 1995
    Assignee: Adtran
    Inventors: Harry Yedid, Richard A. Burch, Michael D. Turner, Kevin W. Schneider
  • Patent number: 5390179
    Abstract: To remotely interrogate a telecommunications services channel unit resident in any office along a tandem network communication link, a control link establishment code sequence comprised of one or more sets of predefined digital code bytes is transmitted from a test system controller. The format of the control link establishment sequence is such that as it is forwarded down the link, any tandem channel unit or units that are intermediate the test system controller and the destination channel unit will transition to a transparent state, so that only the destination channel unit will be able transition to an interrogation, response mode. During the command-response mode, channel units connected in tandem between the selected channel unit and the interrogating test system controller continue to assume a transparent state, so that command and response messages propagate unmodified through such intermediate channel units.
    Type: Grant
    Filed: December 24, 1991
    Date of Patent: February 14, 1995
    Assignee: Adtran
    Inventors: Stephen T. Killian, Jeffrey B. Wells
  • Patent number: 5144625
    Abstract: A method and system for interfacing a transmission facility with a digital subscriber line to enable transmission of digital voice communication and associated digital signalling are provided. A digital signal from the digital subscriber line is demultiplexed into a digital communication signal and a digital input control signal having a first sequence providing standard framing pattern, a second sequence providing signalling identification, and a third sequence providing signalling information. A monitor monitors the sequence of the input control signal and produces a signalling identification detect signal when the second sequence is detected and signalling enablement output when the third sequence is detected. The communication signal from the digital subscriber line is selectively multiplexed with the signalling information from the input control signal. The signalling information is output to the transmission facility when the signalling-enablement output is produced by the monitor.
    Type: Grant
    Filed: December 27, 1990
    Date of Patent: September 1, 1992
    Assignee: Adtran
    Inventors: Roger W. Cain, Dennis B. McMahan
  • Patent number: 5040190
    Abstract: An analog data station terminal is described for use in a high speed data telecommunication system. The analog data station terminal interfaces a customer modem to the local telephone line for transmission of data at very high data rates, e.g., more than 9600 bits per second, with significant reduction in error rate. The analog data station terminal receives analog signals from the customer modem and converts then to a digital form that is compatible with the telephone system. The analog data station terminal also receives digital data from the telephone system and converts it to analog form for input to the customer modem. The formatting and reformatting of the data signals are performed synchronously with the telephone digital data network.
    Type: Grant
    Filed: December 22, 1989
    Date of Patent: August 13, 1991
    Assignee: Adtran
    Inventors: Mark C. Smith, Roger W. Cain
  • Patent number: 4759035
    Abstract: An all rate equalizer provides direct equalization of a data signal which is automatically adjusted based on data rate and transmission line. The equalizer is embodied in a closed loop circuit in which the amplitude of the data signal is the controlled parameter. The DC amplitude of the data signal is restored by an adjustable gain circuit and the bandwidth of the data signal is restored by an adjustable frequency circuit. The signal processing circuits are adjusted by a control processor in accordance with pre-determined tables of control signals corresponding to frequency and gain values required to provide equalization of the data signal for virtually any given data rate and transmission line. The all rate equalizer thereby automatically provides equalization of the data signal that is optimized for any combination of data rate and transmission.
    Type: Grant
    Filed: October 1, 1987
    Date of Patent: July 19, 1988
    Assignee: Adtran
    Inventors: John S. McGary, Norman R. Harris