Patents Assigned to Advanced Interconnect Solutions
  • Patent number: 7104804
    Abstract: An IC package for mounting to a surface of a device board includes a first IC having a first surface supporting a first plurality of conductive leads extending orthogonally from the first surface, a second IC having a second surface supporting a second plurality of conductive leads extending orthogonally from the second surface, the first and second ICs spaced apart in parallel with the first and second surfaces facing, and an interposer trace board parallel to the first and second ICs and positioned between the first and second ICs, the trace board having conducting metal traces on a non-conductive sheet material, the traces accessible from both sides of the trace board, being exposed at selected regions through the non-conductive sheet. The package is characterized in that the conductive traces contact individual ones of the first and second pluralities of conductive leads, providing conductive signal paths from the first and second ICs between the ICs and leading to edges of the IC package.
    Type: Grant
    Filed: July 25, 2001
    Date of Patent: September 12, 2006
    Assignee: Advanced Interconnect Solutions
    Inventor: Victor Batinovich
  • Patent number: 6534419
    Abstract: A method for decreasing the mass and increasing the strength of an IC wafer assembly involves adding a polymer coating to the frontside of the wafer assembly to protect and strengthen the assembly, and removing silicon material from the backside of the wafer assembly, reducing the overall thickness of the assembly. The removal can be by backgrinding or by many other removal techniques, and in some cases is removed to a thickness less than that of the polymer coating.
    Type: Grant
    Filed: September 13, 2000
    Date of Patent: March 18, 2003
    Assignee: Advanced Interconnect Solutions
    Inventor: Ee Chang Ong
  • Patent number: 6347947
    Abstract: A method for providing electrical contact to pads on a surface of a device involves steps of adding a first contact extension to individual ones of the pads, covering the pads and contact extensions with a layer of protective material, removing a portion of the layer of protective material such that a portion of each of the contact extensions is exposed, and applying a second contact extension to individual ones of the exposed first contact extensions. The first extensions may be any of several different kinds, including wires or solder balls, and the protective material layer provides both protection from environmental effects and added lateral strength for the connection of the first extensions to the contact pads.
    Type: Grant
    Filed: July 26, 2000
    Date of Patent: February 19, 2002
    Assignee: Advanced Interconnect Solutions
    Inventor: E. C. Ong
  • Patent number: 6296169
    Abstract: A flux-application fixture for applying flux to die pads in a ball-grid-array assembly process is provided. The fixture comprises a solid plate having a lower surface and an upper surface and a plurality of flux pins formed in the upper surface of the solid plate. The flux pins are contiguous with the solid plate and are formed by removing material from the upper surface of the plate such that the remaining material not removed forms the plurality of flux pins. In a preferred application the material is removed by grinding and the flux plate is ground flat to tight tolerance before removing the material to form the flux pins.
    Type: Grant
    Filed: June 7, 2000
    Date of Patent: October 2, 2001
    Assignee: Advanced Interconnect Solutions
    Inventor: E. C. Ong