Abstract: A floating point arithmetic unit is provided which effectuates arithmetic operations upon floating point numbers. A comparator unit, which may be implemented using a carry-skip chain, determines the relative magnitudes of the exponents of the floating point numbers to be operated upon. A first ripple carry subtractor unit formed within a first ripple carry shifter subtracts a first value corresponding to the exponent of a first of the floating point numbers from a second value corresponding to the exponent of a second of the floating point numbers. A second ripple carry subtractor unit formed within a second ripple carry shifter subtracts the second value from the first value. When certain lower order bit results of the exponent value subtraction operations of each ripple carry subtractor are obtained, the mantissa of the floating point number with the smaller exponent provided to one of the carry ripple shifters is shifted to the right by a number of positions dependent upon the lower order bit results.