Abstract: To load compacted memory between a system memory and a local data share (LDS), a processing system includes an accelerator unit (AU) connected to a memory unit. The memory unit is configured to identify that compacted data in the system memory is to be written to elements of an LDS based on two or more compaction masks. The memory unit is configured to then determine sources within the memory from which to load compacted data into the elements of the LDS by determining pre-fix sums based on the two or more compaction masks. The memory unit is configured to then load the compacted data from the identified sources to corresponding elements of the LDS.

Abstract: Methods and apparatus are disclosed for verifying soft programming of one or more memory cells in a memory device. The methods comprise providing a voltage source to the core cell gate, and verifying soft programming of the cell after overshoot in the regulated voltage source has settled. Also disclosed are memory devices having a logic circuit providing a regulated voltage source to the cell gate during a soft program verify operation, and a sensor to verify soft programming of the cell when a first voltage is applied to the gate from the regulated voltage source. The logic circuit provides a soft program verify signal to the sensor to verify soft programming after overshoot in the voltage source has settled.

Abstract: In a method of determining a linewidth of a polysilicon line formed by a lithographic process, a polysilicon layer is formed on a substrate. A line is patterned from said polysilicon layer using said lithographic process and a Van der Pauw structure is patterned from said polysilicon layer. N2 is then implanted into the polysilicon line and the polysilicon Van der Pauw structure to form a depletion barrier. A P-type dopant is the implanted into the polysilicon line and the polysilicon Van der Pauw structure and the dopant is activated. A sheet resistivity of the Van der Pauw structure is determined, and the linewidth of the polysilicon line is then determined by electrical linewidth measurement using the sheet resistivity of the Van der Pauw structure as the sheet resistivity of the polysilicon line. A related test structure is also disclosed.