Abstract: A circuit for communicating between structures of an integrated circuit through a metallized layer is provided in which parallel data bits are bundled into serial data packages, serialized and sent from a structure to the metallized layer. A destination structure receives the serial data package from the metallized layer and deserializes the package back into a parallel set of data bits. The metallized layer may extend over a significant portion of a substrate of a chip as a metallized data plane or metallized clock plane. Moreover, the metallized layer may be coupled to a pin to allow communications between structures of separate integrated circuits.