Abstract: An in-line system and method for determining T-top gate dimensions is provided. The system comprises a wafer structure undergoing a T-top gate formation process; a scatterometry system coupled to the formation process for directing light at and collecting reflected light from the wafer structure; a signature store; a T-top gate formation analysis system coupled to the scatterometry system and to the signature store for determining the T-top gate dimensions; and a feedback control system coupled to the T-top gate formation analysis system for optimizing T-top gate formation. The method comprises providing a wafer structure having a T-top gate formed thereon; generating a signature associated with the T-top gate; comparing the generated signature with a signature store to determine the dimensions of the T-top gate; if the dimensions of the T-top gate are not within a pre-determined acceptable range, then adjusting T-top gate process parameters using feedback control.
Type:
Grant
Filed:
October 9, 2001
Date of Patent:
August 17, 2004
Assignee:
Advanced Micro Devices, Sinc.
Inventors:
Bhanwar Singh, Bharath Rangarajan, Michael K. Templeton