Patents Assigned to Advanced Power Devices
  • Publication number: 20140346570
    Abstract: A semiconductor device having high breakdown withstand voltage includes a first element which is a normally-on type transistor made of nitride compound semiconductor, a second element which is connected to the first element in series and is a transistor having withstand voltage between a source and a drain lower than withstand voltage of the first element, a first diode which is connected between a gate of the first element or a gate of the second element and a drain of the first element so that a cathode of the first diode is connected at the drain's side and has predetermined avalanche withstand voltage, and a first resistance connected to the gate to which the first diode is connected. The avalanche withstand voltage of the first diode is lower than breakdown voltage of the first element.
    Type: Application
    Filed: September 11, 2013
    Publication date: November 27, 2014
    Applicant: Advanced Power Device Research Association
    Inventor: Katsunori UENO
  • Publication number: 20140008615
    Abstract: A semiconductor device includes a substrate, a channel layer that is formed above the substrate, where the channel layer is made of a first nitride series compound semiconductor, a barrier layer that is formed on the channel layer, a first electrode that is formed on the barrier layer, and a second electrode that is formed above the channel layer. Here, the barrier layer includes a block layers and a quantum level layer. The block layer is formed on the channel layer and made of a second nitride series compound semiconductor having a larger band gap energy than the first nitride series compound semiconductor, and the quantum level layer is made of a third nitride series compound semiconductor having a smaller band gap energy than the second nitride series compound semiconductor, and has a quantum level formed therein.
    Type: Application
    Filed: July 28, 2013
    Publication date: January 9, 2014
    Applicant: ADVANCED POWER DEVICE RESEARCH ASSOCIATION
    Inventors: Makoto UTSUMI, Sadahiro KATOU, Masayuki IWAMI, Takuya KOKAWA
  • Publication number: 20130328106
    Abstract: Provided are a nitride-based semiconductor element with reduced leak current, and a manufacturing method thereof. The semiconductor element comprises a substrate; a buffer region that is formed above the substrate; an active layer that is formed on the buffer region; and at least two electrodes that are formed on the active layer. The buffer region includes a plurality of semiconductor layers having different lattice constants, and there is a substantially constant electrostatic capacitance between a bottom surface of the substrate and a top surface of the buffer region when a potential that is less than a potential of the bottom surface of the substrate is applied to the top surface of the buffer region and a voltage between the bottom surface of the substrate and the top surface of the buffer region is changed within a range corresponding to thickness of the buffer region.
    Type: Application
    Filed: August 13, 2013
    Publication date: December 12, 2013
    Applicant: Advanced Power Device Research Association
    Inventors: Takuya KOKAWA, Sadahiro KATOU, Masayuki IWAMI, Makato UTSUMI, Kazuyuki UMENO
  • Publication number: 20130309828
    Abstract: Provided is a semiconductor device manufacturing method, comprising forming a first sacrificial layer that contacts at least a portion of a first semiconductor layer and has a higher solid solubility for impurities included in the first semiconductor layer than the first semiconductor layer; annealing the first sacrificial layer and the first semiconductor layer; removing the first sacrificial layer through a wet process; after removing the first sacrificial layer, performing at least one of forming an insulating layer that covers at least a portion of the first semiconductor layer and etching a portion of the first semiconductor layer; and forming an electrode layer that is electrically connected to the first semiconductor layer.
    Type: Application
    Filed: July 24, 2013
    Publication date: November 21, 2013
    Applicants: Tohoku University, Advanced Power Device Research Association
    Inventors: Hiroshi KAMBAYASHI, Akinobu TERAMOTO, Tadahiro OHMI
  • Publication number: 20130306979
    Abstract: A GaN-based semiconductor is epitaxially grown on a silicon substrate with a surface orientation of (111). The difference between the lattice constant of the GaN and the silicon (111) surface is approximately 17%, which is quite large. Therefore, the dislocation density of the grown GaN exceeds 1010 cm?2. Screw dislocation density causes the leak current of the transistor using GaN to increases. Furthermore, the mobility of the transistor is reduced. Provided is a semiconductor substrate comprising a silicon substrate and a nitride semiconductor layer that is epitaxially grown on a (150) surface of the silicon substrate.
    Type: Application
    Filed: July 28, 2013
    Publication date: November 21, 2013
    Applicant: ADVANCED POWER DEVICE RESEARCH ASSOCIATION
    Inventors: Masayuki IWAMI, Takuya KOKAWA
  • Publication number: 20130307023
    Abstract: Provided is a semiconductor device that has a buffer layer with which a dislocation density is decreased. The semiconductor device includes a substrate, a buffer region formed over the substrate, an active layer formed on the buffer region, and at least two electrodes formed on the active layer. The buffer region includes at least one composite layer in which a first semiconductor layer having a first lattice constant, a second semiconductor layer having a second lattice constant that is different from the first lattice constant and formed in contact with the first semiconductor layer, and a third semiconductor layer having a third lattice constant that is between the first lattice constant and the second lattice constant are sequentially laminated.
    Type: Application
    Filed: July 28, 2013
    Publication date: November 21, 2013
    Applicant: ADVANCED POWER DEVICE RESEARCH ASSOCIATION
    Inventors: Takuya KOKAWA, Sadahiro KATOU, Masayuki IWAMI, Makoto UTSUMI
  • Publication number: 20130307024
    Abstract: Provided is a semiconductor device that includes a substrate, a first buffer region formed over the substrate, a second buffer region formed on the first buffer region, an active layer formed on the second buffer region, and at least two electrodes formed on the active layer. The first buffer region includes at least one composite layer in which a first semiconductor layer and a second semiconductor layer are sequentially stacked. The second buffer region in includes at least one composite layer in which a third semiconductor layer, a fourth semiconductor layer, and a fifth semiconductor layer are sequentially stacked. The fourth lattice constant has a value between the third lattice constant and the fifth lattice constant.
    Type: Application
    Filed: July 28, 2013
    Publication date: November 21, 2013
    Applicant: ADVANCED POWER DEVICE RESEARCH ASSOCIATION
    Inventors: Takuya KOKAWA, Sadahiro KATOU, Masayuki IWAMI, Makoto UTSUMI
  • Publication number: 20130307063
    Abstract: Provided is a method of manufacturing a gallium-nitride-based semiconductor device, comprising forming a first semiconductor layer of a gallium-nitride-based semiconductor; and forming a recessed portion by dry etching a portion of the first semiconductor layer via a microwave plasma process using a bromine-based gas.
    Type: Application
    Filed: July 24, 2013
    Publication date: November 21, 2013
    Applicants: TOHOKU UNIVERSITY, ADVANCED POWER DEVICE RESEARCH ASSOCIATION
    Inventors: Hiroshi KAMBAYASHI, Akinobu TERAMOTO, Tadahiro OHMI
  • Publication number: 20130306980
    Abstract: A nitride semiconductor device includes a substrate, an electron transit layer and an electron supply layer that are sequentially formed above the substrate, where the electron supply layer has a different band gap energy than the electron transit layer, a drain electrode, a gate electrode, and a source electrode that is formed on the opposite side of the drain electrode with the gate electrode being sandwiched between the drain electrode and the source electrode. Here, a plurality of lower concentration regions are formed so as to be spaced away from each other on the surface of the electron transit layer between the gate electrode and the drain electrode. In the lower concentration regions, the concentration of a two-dimensional electron gas is lower than in other regions.
    Type: Application
    Filed: July 28, 2013
    Publication date: November 21, 2013
    Applicant: ADVANCED POWER DEVICE RESEARCH ASSOCIATION
    Inventors: Yuki NIIYAMA, Jiang LI, Sadahiro KATOU
  • Publication number: 20130292700
    Abstract: A method for fabricating a semiconductor device including GaN (gallium nitride) that composes a semiconductor layer and includes forming a gate insulating film, in which at least one film selected from the group of a SiO2 film and an Al2O3 film is formed on a nitride layer containing GaN by using microwave plasma and the formed film is used as at least a part of the gate insulating film.
    Type: Application
    Filed: January 23, 2012
    Publication date: November 7, 2013
    Applicants: TOHOKU UNIVERSITY, TOKYO ELECTRON LIMTED, Advanced Power Device Research Association
    Inventors: Akinobu Teramoto, Hiroshi Kambayashi, Hirokazu Ueda, Yuichiro Morozumi, Katsushige Harada, Kazuhide Hasebe, Tadahiro Ohmi
  • Publication number: 20130292699
    Abstract: The present invention prevents breakage of a gate insulating film of a MOS device and provides a nitride semiconductor device having improved reliability. An SBD metal electrode provided between a drain electrode and a gate electrode is configured to form a Schottky junction with an AlGaN layer. Further, the SBD metal electrode and a source electrode are connected and electrically short-circuited. Consequently, when an off signal is inputted to the gate electrode, a MOSFET part is turned off and the drain-side voltage of the MOSFET part becomes close to the drain electrode voltage. When the drain electrode voltage increases, the SBD metal electrode voltage becomes lower than the drain-side voltage of the MOSFET part, thus the drain side of the MOSFET part and the drain electrode are electrically disconnected by the SBD metal electrode.
    Type: Application
    Filed: October 26, 2011
    Publication date: November 7, 2013
    Applicant: ADVANCED POWER DEVICE RESEARCH ASSOCIATION
    Inventors: Katsunori Ueno, Shusuke Kaya
  • Patent number: 8552531
    Abstract: A nitride-based compound semiconductor includes an atom of at least one group-III element selected from the group consisting of Al, Ga, In, and B, a nitrogen atom, and a metal atom that forms a compound by bonding with an interstitial atom of the at least one group-III element. The metal atom is preferably iron or nickel. A doping concentration of the metal atom is preferably equal to a concentration of the interstitial atom of the at least one group-III element.
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: October 8, 2013
    Assignee: Advanced Power Device Research Association
    Inventor: Masayuki Iwami
  • Publication number: 20130069076
    Abstract: Provided is a nitride semiconductor device comprising a base substrate; a buffer layer formed above the base substrate; an active layer formed on the buffer layer; and at least two electrodes formed above the active layer. The buffer layer includes one or more composite layers that each have a plurality of nitride semiconductor layers with different lattice constants, and at least one of the one or more composite layers is doped with carbon atoms and oxygen atoms in at least a portion of a carrier region of the nitride semiconductor having the largest lattice constant among the plurality of nitride semiconductor layers, the carrier region being a region in which carriers are generated due to the difference in lattice constants between this nitride semiconductor layer and the nitride semiconductor layer formed directly thereon.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 21, 2013
    Applicant: ADVANCED POWER DEVICE RESEARCH ASSOCIATION
    Inventors: Masayuki IWAMI, Takuya KOKAWA
  • Publication number: 20130052816
    Abstract: A method of producing a semiconductor transistor involving formation of an ohmic electrode on an active layer composed of a GaN-based semiconductor includes a process of forming a first layer 11 composed of tantalum nitride on an active layer 3 and a second layer 12 composed of Al layered on the first layer 11 and a process of forming ohmic electrodes 9s and 9d in ohmic contact with the active layer 3 by heat treating the first layer 11 and the second layer 12 at a temperature of from 520° C. to 600° C.
    Type: Application
    Filed: March 2, 2011
    Publication date: February 28, 2013
    Applicants: TOHOKU UNIVERISTY, ADVANCED POWER DEVICE RESEARCH ASSOCIATION
    Inventors: Hiroshi Kambayashi, Akinobu Teramoto, Tadahiro Ohmi
  • Publication number: 20130043485
    Abstract: A p-type GaN-based semiconductor device is provided. Porivded is a GaN-based semiconductor device including: a first channel layer which is formed from a GaN-based semiconductor, and in which a carrier gas of a first conductivity type occurs; a barrier layer formed on the first channel layer from a GaN-based semiconductor having a higher bandgap than the first channel layer; and a second channel layer which is formed on the barrier layer from a GaN-based semiconductor having a lower bandgap than the barrier layer, and in which a carrier gas of a second conductivity type occurs, wherein the carrier concentration of the carrier gas of the second conductivity type is lower in a region below a first gate electrode than in other regions between a first source electrode and a first drain electrode, and is controlled by the first gate electrode.
    Type: Application
    Filed: August 15, 2012
    Publication date: February 21, 2013
    Applicant: ADVANCED POWER DEVICE RESEARCH ASSOCIATION
    Inventor: Katsunori UENO
  • Publication number: 20130032819
    Abstract: The semiconductor transistor according the present invention includes an active layer composed of a GaN-based semiconductor and a gate insulating film formed on the active layer. The gate insulating film has a first insulating film including one or more compounds selected from the group consisting of Al2O3, HfO2, ZrO2, La2O3, and Y2O3 formed on the active layer, and a second insulating film composed of SiO2 formed on the first insulating film.
    Type: Application
    Filed: March 2, 2011
    Publication date: February 7, 2013
    Applicants: TOHOKU UNIVERISTY, ADVANCED POWER DEVICE RESEARCH ASSOCIATION
    Inventors: Hiroshi Kambayashi, Katsunori Ueno, Takehiko Nomura, Yoshihiro Sato, Akinobu Teramoto, Tadahiro Ohmi
  • Publication number: 20120273795
    Abstract: Provided is a semiconductor device comprising a back barrier layer that is formed by a group III-V compound semiconductor above a substrate; a channel layer that is formed of a group III-V compound semiconductor having less bandgap energy than the back barrier layer, is formed on the back barrier layer, and includes a recessed portion formed in at least a portion of the channel layer above the back barrier layer to be thinner than other portions of the channel layer; a first electrode that is in ohmic contact with the channel layer; and a second electrode formed at least above the recessed portion of the channel layer.
    Type: Application
    Filed: April 25, 2012
    Publication date: November 1, 2012
    Applicant: Advanced Power Device Research Association
    Inventor: Jiang LI
  • Publication number: 20120049182
    Abstract: A nitride-based compound semiconductor includes an atom of at least one group-III element selected from the group consisting of Al, Ga, In, and B, a nitrogen atom, and a metal atom that forms a compound by bonding with an interstitial atom of the at least one group-III element. The metal atom is preferably iron or nickel, A doping concentration of the metal atom is preferably equal to a concentration of the interstitial atom of the at least one group-III element.
    Type: Application
    Filed: July 12, 2011
    Publication date: March 1, 2012
    Applicant: ADVANCED POWER DEVICE RESEARCH ASSOCIATION
    Inventor: Masayuki IWAMI
  • Patent number: 7232558
    Abstract: Solid, shaped and fired fibers of Ti4O7 and Ti5O9 are made by firing TiO2 fibers in a reducing atmosphere. In a first aspect, the TiO2 fibers are made by extruding into air a viscous TiO2 gel and heat treating the resulting green fibers to remove solvent, decompose and to volatilize undesired constituents to form electrically conductive, refractory fibers of Ti4O7 and Ti5O9. In a second aspect, solid, shaped and fired fibers of Ti4O7 and Ti5O9 are made by firing extruded fibers from mixtures of TiO2.
    Type: Grant
    Filed: January 9, 2004
    Date of Patent: June 19, 2007
    Assignee: Advanced Power Devices, Inc.
    Inventors: Richard E. Tressler, James H. Adair, David L. Shelleman, Julie M. Anderson
  • Publication number: 20050029715
    Abstract: Solid, shaped and fired fibers of Ti4O7 and Ti5O9 are made by firing TiO2 fibers in a reducing atmosphere. In a first aspect, the TiO2 fibers are made by extruding into air a viscous TiO2 gel and heat treating the resulting green fibers to remove solvent, decompose and to volatilize undesired constituents to form electrically conductive, refractory fibers of Ti4O7 and Ti5O9. In a second aspect, solid, shaped and fired fibers of Ti4O7 and Ti5O9 are made by firing extruded fibers from mixtures of TiO2.
    Type: Application
    Filed: January 9, 2004
    Publication date: February 10, 2005
    Applicant: Advanced Power Devices
    Inventors: Richard Tressler, James Adair, David Shelleman, Julie Anderson