Patents Assigned to Advanced Power Electronics Corp.
  • Patent number: 11444167
    Abstract: A method of manufacturing a trench type semiconductor device includes the following steps. First, an epitaxial layer is formed on a substrate, then a trench is formed in the epitaxial layer, and a gate structure is formed in the trench. The gate structure includes an upper gate and a lower gate, and an intermediate insulating portion, and the intermediate insulating portion is located in and above the upper gate.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: September 13, 2022
    Assignee: Advanced Power Electronics Corp.
    Inventor: Jau-Yan Lin
  • Patent number: 11264269
    Abstract: A method of manufacturing a trench type semiconductor device includes the following steps. First, an epitaxial layer is formed on a substrate, then a trench is formed in the epitaxial layer, and a gate structure is formed in the trench. The gate structure includes an upper gate and a lower gate, and an intermediate insulating portion, and the intermediate insulating portion is located in the upper gate.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: March 1, 2022
    Assignee: Advanced Power Electronics Corp.
    Inventor: Jau-Yan Lin
  • Publication number: 20140292393
    Abstract: A gate voltage generating circuit to provide a gate voltage to a transistor switch is disclosed. The gate voltage generating circuit includes a first voltage generating circuit and a second voltage generating circuit. The first voltage generating circuit supplies a first voltage to a gate electrode of the transistor switch. The second voltage generating circuit supplies a second voltage to the gate electrode of the transistor switch. The second voltage is larger than a voltage to turn on the transistor switch. The first voltage is larger than the second voltage.
    Type: Application
    Filed: March 29, 2013
    Publication date: October 2, 2014
    Applicant: Advanced Power Electronics Corp.
    Inventor: Cheng-Wen Chang
  • Publication number: 20140240884
    Abstract: The over current protection circuit is coupled to a current path between an output end of a switch and a load. The over current protection circuit includes a first over current detection unit, a second over current detection unit and a control unit. The first over current detection unit is disposed between the current path and a first voltage, and generates a first control signal according to a current in the current path. The second over current detection unit is disposed between the current path and a second voltage, and generates a second control signal according to a current in the current path. The control unit is coupled with the first over current detection unit and the second over current detection unit, and controls the switch according to the first control signal or the second control signal to reduce the current in the current path.
    Type: Application
    Filed: February 25, 2013
    Publication date: August 28, 2014
    Applicant: ADVANCED POWER ELECTRONICS CORP.
    Inventor: Cheng-Wen CHANG
  • Patent number: 6884684
    Abstract: A high density trench power-MOSFET is described in the present invention. The power-MOSFET has a substrate, first and second epi-layers sequentially formed over the substrate and a trench type gate electrode. A silicon nitride layer is formed over the gate electrode to prevent an electrical connecting between the gate electrode and the metal layer formed in a later process.
    Type: Grant
    Filed: May 6, 2003
    Date of Patent: April 26, 2005
    Assignee: Advanced Power Electronics Corp.
    Inventors: Lin-Chung Huang, Keh-Yuh Yu
  • Patent number: 6777295
    Abstract: A method of fabricating trench power MOSFET is described. A first etching step is performed on a substrate to form a plurality of trenches and the substrate has a first doped region and a second doped region and serves as a drain region. A gate oxide layer and a polysilicon layer are then sequentially formed on the second doped region to create a gate region. Subsequent performance of a second etching step utilizes a mask layer to overlap the polysilicon layer. A portion of the second doped region is exposed and the exposed portion defines a base region. The polysilicon layer is etched to expose the gate oxide layer and the base region is simultaneously etched to remove a portion of the second doped region to expose the first doped region for forming an aligned source region. A contact region in the source region is finally formed to fabricate the trench power MOSFET.
    Type: Grant
    Filed: August 12, 2003
    Date of Patent: August 17, 2004
    Assignee: Advanced Power Electronics Corp.
    Inventors: Jau-Yan Lin, Keh-Yuh Yu