Patents Assigned to ADVANCED SEMICONDUCOR ENGINEERING, INC.
  • Patent number: 11062994
    Abstract: A semiconductor device package includes a substrate and an electronic component disposed on the substrate. The electronic component has an active surface facing away from the substrate. The substrate has a first conductive pad and a second conductive pad disposed thereon. The electronic component has a first electrical contact and a second electrical contact disposed on the active surface. The semiconductor device package further includes a first metal layer connecting the first electrical contact with the first conductive pad, a second metal layer connecting the second electrical contact with the second conductive pad, a first seed layer disposed below the first metal layer; and a first isolation layer disposed between the first metal layer and the second metal layer. A method of manufacturing a semiconductor device package is also disclosed.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: July 13, 2021
    Assignee: ADVANCED SEMICONDUCOR ENGINEERING, INC.
    Inventor: Wen-Long Lu
  • Patent number: 11024569
    Abstract: A semiconductor package device includes a circuit layer having a top surface, a first electronic component disposed on the top surface of the circuit layer, and a first conductive element disposed on the top surface of the circuit layer, the first conductive element having a top surface. The first electronic component has an active surface and a back surface facing the top surface of the circuit layer. A distance between the active surface of the first electronic component and the top surface of the circuit layer is greater than a distance between the top surface of the first conductive element and the top surface of the circuit layer.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: June 1, 2021
    Assignee: ADVANCED SEMICONDUCOR ENGINEERING, INC.
    Inventors: Jen-Kuang Fang, Wen-Long Lu
  • Publication number: 20050167804
    Abstract: A substrate for packaging a semiconductor chip is disclosed. The substrate includes a dielectric layer, a plurality of conductive circuits and bonding pads formed on the dielectric layer, a metal thin deposition layer formed on the conductive circuits and the bonding pads, and a solder mask formed on the dielectric layer and the conductive circuits. The first ends of the bonding pads extend from the conductive circuits. The metal thin deposition layer has at least a portion to protrude out of the conductive circuits and the bonding pads such that the protruding portion of the metal thin deposition layer is not supported by the conductive circuits or the bonding pads. The bonding pads are exposed from the solder mask except that the second end of each bonding pad is covered by the solder mask in the manner that the protruding portion of the metal thin deposition layer is embedded in the solder mask. The present invention further provides a method for manufacturing a substrate.
    Type: Application
    Filed: January 28, 2005
    Publication date: August 4, 2005
    Applicant: ADVANCED SEMICONDUCOR ENGINEERING, INC.
    Inventors: Yung Pan, Chia Chen