Patents Assigned to Advanced Silicon Group, Inc.
  • Patent number: 10269995
    Abstract: A process is provided for contacting a nanostructured surface. The process may include (a) providing a substrate having a nanostructured material on a surface, (b) passivating the surface on which the nanostructured material is located, (c) screen printing onto the nanostructured surface and (d) firing the screen printing ink at a high temperature. In some embodiments, the nanostructured material compromises silicon. In some embodiments, the nanostructured material includes silicon nanowires. In some embodiments, the nanowires are around 150 nm, 250 nm, or 400 nm in length. In some embodiments, the nanowires have a diameter range between about 30 nm and about 200 nm. In some embodiments, the nanowires are tapered such that the base is larger than the tip. In some embodiments, the nanowires are tapered at an angle of about 1 degree, about 3 degrees, or about 10 degrees. In some embodiments, a high temperature can be approximately 700 C, 750 C, 800 C, or 850 C.
    Type: Grant
    Filed: June 14, 2017
    Date of Patent: April 23, 2019
    Assignee: Advanced Silicon Group, Inc.
    Inventors: Michael Jura, Marcie R. Black, Jeffrey B. Miller, Joanne Yim, Joanne Forziati, Brian P. Murphy, Richard Chleboski
  • Patent number: 10079322
    Abstract: In an embodiment of the disclosure, a structure is provided which comprises a silicon substrate and a plurality of necklaces of silicon nanowires which are in direct physical contact with a surface of the silicon substrate, wherein the necklaces cover an area of the silicon substrate.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: September 18, 2018
    Assignee: Advanced Silicon Group, Inc.
    Inventors: Marcie R. Black, Jeffrey B. Miller, Michael Jura, Claire Kearns-McCoy, Joanne Yim, Brian P. Murphy
  • Patent number: 9911878
    Abstract: In an aspect of the disclosure, a process for forming nanostructuring on a silicon-containing substrate is provided. The process comprises (a) performing metal-assisted chemical etching on the substrate, (b) performing a clean, including partial or total removal of the metal used to assist the chemical etch, and (c) performing an isotropic or substantially isotropic chemical etch subsequently to the metal-assisted chemical etch of step (a). In an alternative aspect of the disclosure, the process comprises (a) performing metal-assisted chemical etching on the substrate, (b) cleaning the substrate, including removal of some or all of the assisting metal, and (c) performing a chemical etch which results in regularized openings in the silicon substrate.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: March 6, 2018
    Assignee: Advanced Silicon Group, Inc.
    Inventors: Joanne Yim, Jeff Miller, Michael Jura, Marcie R. Black, Joanne Forziati, Brian Murphy, Lauren Magliozzi
  • Patent number: 9859366
    Abstract: A process for etching a substrate comprising polycrystalline silicon to form silicon nanostructures includes depositing metal on top of the substrate and contacting the metallized substrate with an etchant aqueous solution comprising about 2 to about 49 weight percent HF and an oxidizing agent.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: January 2, 2018
    Assignee: Advanced Silicon Group, Inc.
    Inventors: Brent A. Buchine, Marcie R. Black, Faris Modawar
  • Patent number: 9783895
    Abstract: In an aspect of this disclosure, a method is provided comprising the steps of: (a) providing a silicon-containing substrate, (b) depositing a first metal on the substrate, (c) etching the substrate produced by step (b) using a first etch, and (d) etching the substrate produced by step (c) using a second etch, wherein the second etch is more aggressive towards the deposited metal than the first etch, wherein the result of step (d) comprises silicon nanowires. The method may further comprise, for example, steps (b1) subjecting the first metal to a treatment which causes it to agglomerate and (b2) depositing a second metal.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: October 10, 2017
    Assignee: Advanced Silicon Group, Inc.
    Inventors: Joanne Yim, Jeffrey B. Miller, Michael Jura, Marcie R. Black, Joanne Forziati, Brian P. Murphy, Adam Standley
  • Patent number: 9768331
    Abstract: A process is provided for contacting a nanostructured surface. The process may include (a) providing a substrate having a nanostructured material on a surface, (b) passivating the surface on which the nanostructured material is located, (c) screen printing onto the nanostructured surface and (d) firing the screen printing ink at a high temperature. In some embodiments, the nanostructured material compromises silicon. In some embodiments, the nanostructured material includes silicon nanowires. In some embodiments, the nanowires are around 150 nm, 250 nm, or 400 nm in length. In some embodiments, the nanowires have a diameter range between about 30 nm and about 200 nm. In some embodiments, the nanowires are tapered such that the base is larger than the tip. In some embodiments, the nanowires are tapered at an angle of about 1 degree, about 3 degrees, or about 10 degrees. In some embodiments, a high temperature can be approximately 700 C, 750 C, 800 C, or 850 C.
    Type: Grant
    Filed: July 23, 2014
    Date of Patent: September 19, 2017
    Assignee: Advanced Silicon Group, Inc.
    Inventors: Michael Jura, Marcie R. Black, Jeffrey B. Miller, Joanne Yim, Joanne Forziati, Brian P. Murphy, Richard Chleboski
  • Patent number: 9601640
    Abstract: A process is provided for contacting a nanostructured surface. In that process, a substrate is provided having a nanostructured material on a surface, the substrate being conductive and the nanostructured material being coated with an insulating material. A portion of the nanostructured material is at least partially removed. A conductor is deposited on the substrate in such a way that it is in electrical contact with the substrate through the area where the nanostructured material has been at least partially removed.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: March 21, 2017
    Assignee: Advanced Silicon Group, Inc.
    Inventors: Marcie R. Black, Joanne Forziati, Michael Jura, Jeff Miller, Brian Murphy, Adam Standley
  • Patent number: 9449855
    Abstract: In an aspect of this disclosure, a method is provided comprising the steps of: (a) providing a silicon-containing substrate, (b) depositing a first metal on the substrate, (c) etching the substrate produced by step (b) using a first etch, and (d) etching the substrate produced by step (c) using a second etch, wherein the second etch is more aggressive towards the deposited metal than the first etch, wherein the result of step (d) comprises silicon nanowires. The method may further comprise, for example, steps (b1) subjecting the first metal to a treatment which causes it to agglomerate and (b2) depositing a second metal.
    Type: Grant
    Filed: July 13, 2014
    Date of Patent: September 20, 2016
    Assignee: ADVANCED SILICON GROUP, INC.
    Inventors: Joanne Yim, Jeffrey B. Miller, Michael Jura, Marcie R. Black, Joanne Forziati, Brian P. Murphy, Adam Standley
  • Publication number: 20150380583
    Abstract: In an embodiment of the disclosure, a structure is provided which comprises a silicon substrate and a plurality of necklaces of silicon nanowires which are in direct physical contact with a surface of the silicon substrate, wherein the necklaces cover an area of the silicon substrate.
    Type: Application
    Filed: January 29, 2014
    Publication date: December 31, 2015
    Applicant: ADVANCED SILICON GROUP, INC.
    Inventors: Marcie R. Black, Jeff Miller, Michael Jura, Claire Kearns-McCoy, Joanne Yim, Brian P. Murphy
  • Patent number: 9202868
    Abstract: A process is provided for etching a silicon-containing substrate to form nanowire arrays. In this process, one deposits nanoparticles and a metal film onto the substrate in such a way that the metal is present and touches silicon where etching is desired and is blocked from touching silicon or not present elsewhere. One submerges the metallized substrate into an etchant aqueous solution comprising HF and an oxidizing agent. In this way arrays of nanowires with controlled diameter and length are produced.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: December 1, 2015
    Assignee: Advanced Silicon Group, Inc.
    Inventors: Brent Buchine, Marcie R. Black, Faris Modawar
  • Patent number: 9136410
    Abstract: Another aspect of the present disclosure relates to a device including a substrate, having a top surface and a bottom surface; an array of nanowires having a base and a top surface, the base contacting the top surface of the substrate; a contacting structure including the same material as the substrate having a non-nanostructured surface of a dimension suitable for forming an electrical contact, located on the same side of the substrate as the array of silicon nanowires; wherein the contacting structure is doped with a greater impurity concentration than the nanowire array, thereby forming a selective emitter.
    Type: Grant
    Filed: August 24, 2014
    Date of Patent: September 15, 2015
    Assignee: Advanced Silicon Group, Inc.
    Inventors: Faris Modawar, Marcie R. Black, Brian Murphy, Jeff Miller, Mike Jura