Abstract: A mixed signal testing system capable of testing differently configured units under test (UUT) includes a controller, a test station and an interface system that support multiple UUTs. The test station includes independent sets of channels configured to send signals to and receive signals from each UUT being tested and signal processing subsystems that direct stimulus signals to a respective set of channels and receive signals in response thereto. The signal processing subsystems enable simultaneous and independent directing of stimulus signals through the sets of channels to each UUT and reception of signals from each UUT in response to the stimulus signals. Received signals responsive to stimulus signals provided to a fully functional UUT (with and without induced faults) are used to assess presence or absence of faults in the UUT being tested which may be determined to include one or more faults or be fault-free, i.e., fully functional.

Abstract: A mixed signal testing system capable of testing differently configured units under test (UUT) includes a controller, a test station and an interface system that support multiple UUTs. The test station includes independent sets of channels configured to send signals to and receive signals from each UUT being tested and signal processing subsystems that direct stimulus signals to a respective set of channels and receive signals in response thereto. The signal processing subsystems enable simultaneous and independent directing of stimulus signals through the sets of channels to each UUT and reception of signals from each UUT in response to the stimulus signals. Received signals responsive to stimulus signals provided to a fully functional UUT (with and without induced faults) are used to assess presence or absence of faults in the UUT being tested which may be determined to include one or more faults or be fault-free, i.e., fully functional.

Abstract: Method and modular system for generating, capturing and re-displaying SDI video signals. When generating a video signal, data blocks are arranged in a line parameter memory, each corresponding to a complete video line and containing pointers to specific entries for lines of the video signal in a primary image memory holding a main bit-mapped image, and a video line construct memory holding data enable and blanking patterns before being serialized into a output data stream. On the capture side, a de-serializer/equalizer accepts an input data stream extracts Y (luminance), CB (blue-difference chroma) and CR (red-difference chroma) data along with clock/sync information which can be used for re-display. Optional support of HDMI, DVI and analog formats, such as composite video, raster video and stroke video, allows a single instrument to generate, acquire and process virtually all known video interfaces, using standard or custom image/formats.

Abstract: Method for generating a model of the effect of phase noise during use of a Doppler radar system including calculating, using a processor, an initial signal-to-clutter ratio (SCR) representing a ratio of power received from echoes from a target by the radar system to power resulting from clutter reflection received by the radar system. The initially calculated SCR is modified as a function of a range ambiguity and range resolution. A Doppler frequency of interest is calculated based on velocity of a target, target heading and radar frequency, along with a Doppler filter bandwidth, frequency components and a measure of clutter signal passing through the Doppler filter of interest by summing products of the phase noise for each frequency by the Doppler filter bandwidth. This measure indicates effectiveness of target detection by the Doppler radar system as a function of distance.

Abstract: Chassis for an automated test system including a housing and at least a first and a second backplane in the housing. The first backplane provides electrical connections for at least one functional module of a first type when engaged with the first backplane, while the second backplane provides electrical connections for at least one functional module of a second type different than the first type when engaged with the second backplane. The first and second backplanes include electrical circuitry to enable signals to be provided for the functional modules when engaged therewith. A bottom of the housing includes ducts to enable cooling of both types of functional modules when engaged with the housing.

Abstract: Method and arrangement for displaying a digital waveform in an eye diagram simultaneously with an indication of acceptability of the digital waveform. A decoded digital waveform is separated into overlapping waveform permutations based on a number of digital states and transition points in the eye diagram. Submasks equal in number to the waveform permutations and that are derived from a common, known good waveform, are retrieved from a memory component. Each retrieved submask is applied to a corresponding waveform permutation to determine any locations at which the waveform permutation exceeds a boundary of the submask. Only one submask is applied to each waveform permutation. The waveform is displayed in the eye diagram simultaneous with a visual indication of the locations at which any of the waveform permutations exceeds the boundary of the corresponding submask, to enable visual assessment of the acceptability/validity of the digital waveform.

Abstract: A mixed signal testing system capable of testing differently configured units under test (UUT) includes a controller, a test station and an interface system that support multiple UUTs. The test station includes independent sets of channels configured to send signals to and receive signals from each UUT being tested and signal processing subsystems that direct stimulus signals to a respective set of channels and receive signals in response thereto. The signal processing subsystems enable simultaneous and independent directing of stimulus signals through the sets of channels to each UUT and reception of signals from each UUT in response to the stimulus signals. Received signals responsive to stimulus signals provided to a fully functional UUT (with and without induced faults) are used to assess presence or absence of faults in the UUT being tested which may be determined to include one or more faults or be fault-free, i.e., fully functional.

Abstract: A mixed signal testing system capable of testing differently configured units under test (UUT) includes a controller, a test station and an interface system that support multiple UUTs. The test station includes independent sets of channels configured to send signals to and receive signals from each UUT being tested and signal processing subsystems that direct stimulus signals to a respective set of channels and receive signals in response thereto. The signal processing subsystems enable simultaneous and independent directing of stimulus signals through the sets of channels to each UUT and reception of signals from each UUT in response to the stimulus signals. Received signals responsive to stimulus signals provided to a fully functional UUT (with and without induced faults) are used to assess presence or absence of faults in the UUT being tested which may be determined to include one or more faults or be fault-free, i.e., fully functional.

Abstract: Flowchart generation method and tool is provided with an easy-to-use graphical user interface. The graphical user interface of the tool enables a user to select a programming language which the test program was written in, and a test station which the test program was developed for. Upon these selections, a parser will point to the configuration files appropriate for the selected language and test station. The configuration files contain rules and definitions of the chosen programming language and test station, so that the parsing of the test program language can begin. Utilizing the data created from the parsing process, the tool points to other configuration files, referred to as a flowcharting configuration file, that each contain information on how to present the parsed data in a flow chart.

Abstract: Chassis for an automated test system including a housing and at least a first and a second backplane in the housing. The first backplane provides electrical connections for at least one functional module of a first type when engaged with the first backplane, while the second backplane provides electrical connections for at least one functional module of a second type different than the first type when engaged with the second backplane. The first and second backplanes include electrical circuitry to enable signals to be provided for the functional modules when engaged therewith. A bottom of the housing includes ducts to enable cooling of both types of functional modules when engaged with the housing.

Abstract: A module that incorporates a chassis for enabling use of at least one smaller functional module in at least one slot of a chassis designed to mate with a larger functional module having a different standard than the smaller functional module. The module has a housing having electrical connections adapted to mate with electrical connections provided by the chassis for the larger functional module and dimensions that fit within at least one slot provided by the chassis for housing the larger functional module. The module includes at least one set of electrical connections adapted to mate with the electrical connections of the smaller functional module(s) and at least one air passage for conveying air from an opening of the chassis that provides air flow to cool the larger functional module to an area in which the smaller functional module(s) is/are situated when mated with the housing.

Abstract: Arrangement in an automated test system to connect to a plurality of functional modules of different forms including a common chassis defining a plurality of identical connectors and a backplane associated with the chassis and providing electrical connections for functional modules when engaged with the connectors. A set of adapters is provided including a first adapter having a coupling at an attachment end and a module receiving end configured to mate with one or more functional modules each having a first form, and a second adapter having a coupling at an attachment end and a module receiving end configured to mate with one or more functional modules each having a second form different than the first form. The couplings of the adapters are the same such that the adapters are freely insertable via their attachment ends into engagement with any of the connectors.

Abstract: Method and system that produce requisite drive signals to fully exercise and test electromechanical elements of a liquid rocket stage including solenoid valve drives, DC motor drives and actuator drive signals. The electrical driver tester includes a signal processor, power driver circuits, and A/D and D/A circuits to monitor and control the drive circuitry. Drive current is monitored and a signal proportional to the current is produced for the purpose of analyzing current profiles as part of the test regimen for the device under test. Actuator speed and positioning are controlled in real time with a tailored lead lag control algorithm implemented with digital signal processor hardware.

Abstract: Cable interconnection terminated by a pin or socket includes a housing, an inner conductor arranged in the housing and having a first end adapted to couple to the pin or socket, and an outer sheath adapted to couple to an outer sheath of a cable including at least one conductor, e.g., a coaxial cable, twin-axial cable or tri-axial cable. The interconnection also includes first and second pins. The first pin is arranged at a second end of the inner conductor while the second pin is electrically connected to the outer sheath. The first and second pins each have a mating portion, and both mating portions terminate at a common plane a set distance from the housing. This termination in a common plane, substantially perpendicular to the axial direction of the pins, enables the cable to mate with a wide range of electronic componentry.

Abstract: Phase noise analyzing system that analyzes phase noise in radio frequency (RF) signals provided by a device under test when coupled thereto includes a low noise receiver that receives at a first input, signal from the device under test when coupled thereto, a low noise synthesizer that provides output to the receiver, a frequency domain analyzer that receives output from the receiver, a time domain analyzer that receives output from the receiver, a switching system that controls signal flow to and from the receiver, the synthesizer, the frequency domain analyzer and the time domain analyzer, and a computer that controls the switching system to perform the analysis of phase noise in signals provided by the device under test.

Abstract: Method and system for testing any type of video display, video monitor or other device that produces a video signal, and that is capable of providing information about the video and optionally audio specifications and/or capabilities of the output signal to an external device when coupled thereto. The external device obtains the information about the specifications and/or capabilities and based thereon, assembles one or more pre-defined tests from a test database/repository containing tests to enable testing of compliance of the video signal producing device to those specifications and/or capabilities. This compliance testing may entail generating video or audio content at a source generator, providing it to the video signal producing device, and determining the accuracy of the output of the video signal producing device to the input content. A determination of the results of this test may be provided to an operator of the testing apparatus.

Abstract: Method of capturing multiple format video signals and reformatting them in real-time for display on generic external monitors, is disclosed. This method is intended for, by not limited to, implementation on a multiple function video test instrument with video generation and video capture capabilities. The method is capable of operating with standard and non-standard format synchronized video waveforms and also with deflection-driven video waveforms. Since this innovative method reuses already available functionality in the video test instrument, the new functionality is realized efficiently, economically and does not require any more space within the test instrument.

Abstract: Method and modular system for generating and capturing DVI video signals. When generating a video signal, data blocks are arranged in a line parameter memory, each corresponding to a complete video line and containing pointers to specific entries for lines of the video signal in a primary image memory holding a main bit-mapped image, and a video line construct memory holding data enable and blanking patterns. Generation of the video signal is initiated by reading the line parameter memory and extracting pointers from the data blocks for a first line of the video signal being generated. Bits from the primary image and video line construct memories are obtained and combined based on extracted pointers to generate the first line of the video signal. A length of the first line of video signal is monitored to determine when it is complete, and then the process continues for each additional line.

Abstract: Video processing arrangement including a host computer, a video asset coupled to the computer for generating video signals, and an interface for connecting the video asset to the computer to enable the display of the video signals on a monitor. The video asset includes primary elements such as a primary composite video module that produces different types of a primary video signal and outputs the primary video signal, and a secondary video source module that produces a secondary composite video signal and outputs the secondary composite video signal. The primary composite video module includes a memory component including a user-programmable sequence of bits representative of a video signal and user-programmable signal generators synchronized to the primary video signal output of the primary composite video module. The memory component includes four user specified pulse memories which each hold a series of arbitrary bit line patterns.

Abstract: Video processing arrangement including a host computer having a monitor, a video asset coupled to the computer for generating video signals and an interface for connecting the video asset to the computer to enable the display of video signals on the monitor. The video asset includes various primary elements including a primary composite video module for producing different types of a primary video signal and outputting the primary video signal via output channels, a stroke generator module for generating a stroke XYZ video signal and outputting the stroke video signal via output channels and a real time capture module for capturing video signals in a plurality of different modes. The video asset also includes a common distributed time base module for generating and distributing clock signals to all of the primary elements.