Patents Assigned to Advantest Corporation
  • Patent number: 11231460
    Abstract: An apparatus for providing a supply voltage to a device under test includes a controlled source configured to provide a voltage in dependence on one or more control signals; a switchable resistor circuited between the output of the controlled source and a DUT port, having first and second resistances in first and second switch states, respectively, the second resistance being smaller than the first resistance; a regulator configured to provide a control signal to the controlled source, to regulate a voltage to be provided to the DUT in dependence on information about a desired voltage; a capacitor circuited in parallel to the switchable resistor at least during switching of the switchable resistor and configured to slow a voltage change across the switchable resistor which is caused by changing a switch state of the switchable resistor; the apparatus being configured to change a switch state of the switchable resistor while a voltage is provided to the DUT via the switchable resistor.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: January 25, 2022
    Assignee: ADVANTEST CORPORATION
    Inventors: Martin Mücke, Peter Horvath
  • Publication number: 20220011340
    Abstract: A test carrier carried in a state of accommodating a device under test (DUT) includes: a carrier body that holds the DUT; and a lid member that covers the DUT and is attached to the carrier body. The lid member includes a through-hole for sucking the DUT that is provided to face the DUT and penetrating through the lid member.
    Type: Application
    Filed: September 24, 2021
    Publication date: January 13, 2022
    Applicant: ADVANTEST Corporation
    Inventors: Toshiyuki Kiyokawa, Kazuya Ohtani
  • Publication number: 20220011342
    Abstract: A test carrier carried in a state of accommodating a device under test (DUT) includes: a carrier body that holds the DUT; a lid member that covers the DUT and is attached to the carrier body; and an identifier for identifying an individual of the test carrier.
    Type: Application
    Filed: September 24, 2021
    Publication date: January 13, 2022
    Applicant: ADVANTEST Corporation
    Inventors: Toshiyuki Kiyokawa, Kazuya Ohtani
  • Publication number: 20220011341
    Abstract: A test carrier carried in a state of accommodating a device under test (DUT) includes: a carrier body that holds the DUT, and a lid member that covers the DUT and is attached to the carrier body. The carrier body has a first through-hole for positioning that is provided to face the DUT.
    Type: Application
    Filed: September 24, 2021
    Publication date: January 13, 2022
    Applicant: ADVANTEST Corporation
    Inventors: Toshiyuki Kiyokawa, Kazuya Ohtani
  • Publication number: 20220011343
    Abstract: A test carrier carried in a state of accommodating a device under test (DUT) includes: a carrier body that holds the DUT; and a lid member that covers the DUT and is attached to the carrier body. The lid member includes: a plate-like main body; and a pusher protruding from the main body in a convex shape.
    Type: Application
    Filed: September 24, 2021
    Publication date: January 13, 2022
    Applicant: ADVANTEST Corporation
    Inventors: Toshiyuki Kiyokawa, Kazuya Ohtani
  • Patent number: 11219119
    Abstract: Method for providing an electrical connection, comprising connecting a first cable to a first conducting structure on a printed circuit board, connecting a second cable to a second conducting structure on the printed circuit board, comparing a propagation delay of a first signal path comprising the first cable and the first conducting structure on the printed circuit board, and a propagation delay of a second signal path comprising the second cable and the second conducting structure on the printed circuit board; and removing conductive material of the first conducting structure and/or of the second conducting structure, in order to modify an electrical length of the first conducting structure and/or of the second conducting structure, to obtain a first conducting path and a second conducting path, in dependence on a result of the comparison, in order to reduce a difference of the propagation delays between the first signal path and the second signal path.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: January 4, 2022
    Assignee: Advantest Corporation
    Inventor: Sylvia Ehrler
  • Publication number: 20210396716
    Abstract: According to the present invention, an optical ultrasonic wave measuring apparatus includes an ultrasonic pulse output section, a light pulse output section, a reflected wave measuring section, an optoacoustic wave measuring section, an exceeding time point acquiring section, and a measurement result shifting section. The reflected wave measuring section measures, in correspondence to time, a reflected wave as a result of reflection of the ultrasonic pulse at a measuring target. The optoacoustic wave measuring section measures, in correspondence to time, an optoacoustic wave generated by the light pulse at the measuring target. The exceeding time point acquiring section acquires an exceeding time point at which a measurement result of the reflected wave exceeds a predetermined threshold value. The measurement result shifting section shifts a measurement result of the optoacoustic wave by a first shift time toward the time point of output of the light pulse.
    Type: Application
    Filed: May 28, 2021
    Publication date: December 23, 2021
    Applicant: ADVANTEST Corporation
    Inventors: Taiichiro IDA, Hideaki IWAZAKI
  • Patent number: 11200156
    Abstract: A tester for testing a device under test is shown, having a test unit configured for performing a test of the device under test using multiple test cases, each test case having variable values of a set of predetermined variables, the test units configured to derive an output value for each test case indicating whether the device under test validly operates at a current test case or whether the device under test provides an error at the current test case; and an evaluation unit configured for evaluating the multiple test cases based on a plurality of subsets of the predetermined input variables with respect to the output value, the evaluation unit configured for providing a number of plots of the evaluation of the multiple test cases where each plot indicates the impact of one subset of the plurality of subsets of the predetermined input variables to the output value in dependence on respective relevance scores or associated with the respective relevance scores.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: December 14, 2021
    Assignee: ADVANTEST CORPORATION
    Inventor: Jochen Rivoir
  • Publication number: 20210376544
    Abstract: A wiring board includes a wiring board body and a coaxial connector. The coaxial connector includes coaxial terminals and a housing. The coaxial terminals are arranged in row. Each of the coaxial terminals includes a signal terminal and a ground terminal. The ground terminal includes a tubular main body and first and second contact pieces that respectively extend from the main body and respectively include first and second contact portions in contact with the wiring board body, in a transparent plan view seen through the wiring board along a normal direction of the wiring board body. A part of the first contact piece of a first coaxial terminal overlaps with a part of the second contact piece of a second coaxial terminal adjacent to the first coaxial terminal.
    Type: Application
    Filed: March 15, 2021
    Publication date: December 2, 2021
    Applicants: ADVANTEST Corporation, Molex, LLC
    Inventors: Takahito Seshimo, Atsunori Shibuya, Masayuki Arai, Masataka Oyama, Shigeru Akiyama, Ayako Matsumoto
  • Publication number: 20210376529
    Abstract: A coaxial terminal includes a signal terminal, a tubular ground terminal that covers the signal terminal, and an insulating member interposed between the signal terminal and the ground terminal. The signal terminal includes a main body that is covered by the insulating member, an upper contact piece that extends from the main body to +Z direction side, and a lower contact piece that extends from the main body to ?Z direction side. The insulating member has an opening through which a part of the main body is exposed. A following formula (1) is satisfied: L2?½×L1??(1) where L1 is a length of the insulating member along an axial direction of the coaxial terminal, L2 is a length of the opening along the axial direction.
    Type: Application
    Filed: March 15, 2021
    Publication date: December 2, 2021
    Applicants: ADVANTEST Corporation, Molex, LLC
    Inventors: Takahito Seshimo, Atsunori Shibuya, Masayuki Arai, Masataka Oyama, Shigeru Akiyama, Ayako Matsumoto
  • Patent number: 11190137
    Abstract: An amplifier includes an amplifying device and a bias circuit for providing a bias voltage for the amplifying device. The bias circuit is configured to provide the bias voltage in dependence of an output signal of an optical coupling arrangement which provides for electrical isolation.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: November 30, 2021
    Assignee: ADVANTEST CORPORATION
    Inventor: Anton Thoma
  • Patent number: 11187743
    Abstract: An automated test equipment for testing devices under test is configured to combine different output signals from multiple pins of a single device under test or from pins of a plurality of devices under test to obtain a combined signal; and to extract individual signals or properties of the individual signals from the combined signal.
    Type: Grant
    Filed: November 24, 2017
    Date of Patent: November 30, 2021
    Assignee: ADVANTEST CORPORATION
    Inventors: Andreas Hantsch, Jochen Rivoir
  • Patent number: 11181504
    Abstract: A nanopore device measures a current signal Is that flows through the nanopore device, which has an aperture and an electrode pair. A transimpedance amplifier converts the current signal Is into a voltage signal Vs. A voltage source is configured to apply a DC bias voltage Vb across the electrode pair in a normal measurement mode, and to apply a calibration voltage Vcal across the electrode pair in a calibration mode. In the calibration mode, at least one circuit constant of a measurement apparatus is calibrated based on the output signal Vs of the transimpedance amplifier and the calibration voltage Vcal.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: November 23, 2021
    Assignee: ADVANTEST CORPORATION
    Inventor: Nobuei Washizu
  • Patent number: 11182274
    Abstract: A test apparatus for performing a test on a device under test includes a data storage unit being configured to store sets of input data applied to the device under test during the test and to store the respective output data of the device under test, the output data being obtained from the device under test as a response to the input data including values of setting variables related to settings of the device under test and values of input variables including further information, each set of input data representing one test case; and a data processor configured to process the data stored in the data storage unit such that a best combination of setting variables of the device under test is determined for one or more combinations of the input variables to obtain an optimized setting of the device under test for the one or more combinations of the input variables.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: November 23, 2021
    Assignee: Advantest Corporation
    Inventor: Jochen Rivoir
  • Patent number: 11181576
    Abstract: An electronic component handling apparatus includes: a moving device that presses a device under test (DUT) against a socket of a test head. The moving device includes: a pusher that contacts the DUT; and a heater that heats the DUT through the pusher. The pusher includes: an internal space; and a first flow path that communicates with the internal space. Fluid from the test head is supplied to the internal space through the first flow path.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: November 23, 2021
    Assignee: ADVANTEST Corporation
    Inventors: Yasuyuki Kato, Yuya Yamada, Shintaro Takaki, Hiroki Hosogai
  • Patent number: 11169205
    Abstract: A waveform data acquisition module includes an A/D converter that converts an electrical signal relating to a DUT into a digital signal, and a first memory unit that stores waveform data configured as a digital signal sequence. A function test module includes a test unit and a second memory unit. A higher-level controller instructs the waveform data acquisition module to start data sampling, and holds the time point thereof. Furthermore, the higher-level controller instructs the function test module to start to execute a pattern program, and records the time point thereof. The first memory unit records the time point at which the data sampling is started. The higher-level controller records the time point at which the execution of the pattern program is started.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: November 9, 2021
    Assignee: ADVANTEST CORPORATION
    Inventors: Naoya Toyota, Yasuki Akita
  • Patent number: 11162990
    Abstract: A calibration arrangement for calibrating a power source includes first and second resistors with first and second resistances, respectively, which are usable in calibrating the power source. The second resistance is smaller than the first resistance and the calibration arrangement is configured to allow for a measurement of the first resistance of the first resistor. The calibration arrangement is configured to form a series connection of the first resistor and of the second resistor, to allow for at least two voltage measurements between at least two different pairs of circuit nodes of the series connection, wherein a same current is applied during the at least two voltage measurements, and to derive the second resistor with a second resistance on the basis of the at least two voltage measurements and a result of the measurement of the first resistance of the first resistor.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: November 2, 2021
    Assignee: Advantest Corporation
    Inventor: Atsushi Nakamura
  • Patent number: 11156659
    Abstract: A system for performing an automated test is disclosed. The method comprises receiving a plurality of work orders and a plurality of constraints for scheduling a plurality of tests on a plurality of DUTs using automated test equipment (ATE) available on a production floor, wherein the ATE comprises a plurality of test cells, and wherein each test cell comprises a plurality of testers and an automated handler. The method further comprises developing a test plan to execute the plurality of tests, wherein the test plan is customized in accordance with the information in the plurality of work orders and the plurality of constraints. Finally, the method comprises scheduling the plurality of tests to the plurality of test cells to maximize throughput of the plurality of DUTs.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: October 26, 2021
    Assignee: Advantest Corporation
    Inventors: Leon Chen, Rotem Nahum
  • Patent number: 11143697
    Abstract: A system for performing tests using automated test equipment (ATE) is disclosed. The system comprises a robot comprising an end effector operable to pick up and transfer a DUT in-and-out of a test slot in a primitive. The system further comprises a system controller comprising a memory and a processor for controlling the robot. Also, the system comprises a test rack comprising a plurality of primitives, wherein the primitive is a modular device comprising a plurality of slots for testing a plurality of DUTs, and wherein the robot is configured to access slots in the plurality of primitives within the test rack using the end effector.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: October 12, 2021
    Assignee: ADVANTEST CORPORATION
    Inventor: Roland Wolff
  • Patent number: 11137446
    Abstract: A test apparatus is configured to test a DUT that does not support synchronous control from an external circuit. A main controller is configured based on an architecture that tests a device by synchronous control with the main controller itself as the master. A MIU is configured as an interface between the main controller and the DUT. The MIU establishes asynchronous control between it and the DUT with the DUT as the master, and establishes control between it and the main controller with the main controller as the master.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: October 5, 2021
    Assignee: ADVANTEST CORPORATION
    Inventors: Shuichi Inage, Kazuhiro Iezumi, Tomoyuki Itakura, Keisuke Kusunoki, Yoshihiro Kato, Kazuhiro Tsujikawa, Naoya Kimura, Yuki Watanabe, Yuichiro Harada, Koji Miyauchi