Abstract: A testing apparatus comprises a test interface board comprising a plurality of socket interface boards, wherein each socket interface board comprises: a) an open socket to hold a DUT; b) a discrete active thermal interposer comprising thermal properties and operable to make thermal contact with the DUT; c) a superstructure operable to contain the discrete active thermal interposer; and d) an actuation mechanism operable to provide a contact force to bring the discrete active thermal interposer in contact with the DUT.

Abstract: A high volume system level testing of devices with POP structures such as POP memories includes a POP array that includes floating nests that can adjust in the XY direction in order to align individually with respective pads found on the DUTs. The floating nests also include a mechanically fixed PCB that is fixed to the nest and can either mate to a memory contactor array that can accept an unattached POP device such as a memory or can include an attached memory in order to accommodate different POP requirements. In a method, the POP array includes a number of floating nests with memory loaded are aligned and presented to their respective DUTs just prior to testing the combined DUT and POP memory assemblies.