Patents Assigned to Aegis, Inc.
  • Surface mount device with high thermal conductivity
    Patent number: 5188985
    Abstract: A surface mount package for encapsulating an electronic device is provided. The package has a ceramic frame containing a plurality of apertures. Copper-tungsten composite metallic components are bonded to the ceramic frame and individually extend across each of the apertures. The metallic components may include a flange for bonding and a pedestal extending into each aperture.
    Type: Grant
    Filed: April 21, 1992
    Date of Patent: February 23, 1993
    Assignee: Aegis, Inc.
    Inventors: Manuel Medeiros, III, Jay S. Greenspan
  • Surface mount device with high thermal conductivity
    Patent number: 5111277
    Abstract: A surface mount package for encapsulating an electronic device is provided. The package has a ceramic frame containing a plurality of apertures. Copper-tungsten composite metallic components are bonded to the ceramic frame and individually extend across each of the apertures. The metallic components may include a flange for bonding and a pedestal extending into each aperture.
    Type: Grant
    Filed: March 29, 1991
    Date of Patent: May 5, 1992
    Assignee: Aegis, Inc.
    Inventors: Manuel Medeiros, III, Jay S. Greenspan
  • Lead frame having non-conductive tie-bar for use in integrated circuit packages
    Patent number: 4768077
    Abstract: The present invention is directed to a lead frame having both electrically conductive and electrically non-conductive tie-bar portions. The electrically conductive tie-bar portion allows the attached leads to be simultaneously electroplated, yet is removable from the lead frame, leaving the electrically non-conductive tie-bar portion which provides support for the leads. The advantages to the electrically non-conductive tie-bar portion include substantially decreasing the leads' bending and/or breaking from the package, during both manufacturing and/or testing of the integrated circuit.
    Type: Grant
    Filed: February 20, 1986
    Date of Patent: August 30, 1988
    Assignee: Aegis, Inc.
    Inventor: Jeremy D. Scherer
  • All metal flat package for microcircuitry
    Patent number: 4649229
    Abstract: A flat package for electric microcircuits has an iron-nickel-cobalt alloy frame which is brazed to a molybdenum bottom at a temperature below about 400.degree. C. The molybdenum bottom has successive layers of copper, nickel and gold plating.
    Type: Grant
    Filed: August 12, 1985
    Date of Patent: March 10, 1987
    Assignee: Aegis, Inc.
    Inventors: Jeremy D. Scherer, Steven A. Tower
  • Microcircuit package and sealing method
    Patent number: 4633573
    Abstract: A microcircuit package and sealing method in which a non-organic coating is used to hermetically seal the microcircuit. The microcircuit is isolated and insulated in order to protect the microcircuit from the high temperatures required to apply and cure a non-organic coating. The materials and methods used to isolate and insulate the microcircuit are chosen so that the thermal coefficients of the materials are complementary and thus form a highly reliable, durable seal, while also insulating the microcircuit during the process of applying the non-organic coating.
    Type: Grant
    Filed: May 23, 1984
    Date of Patent: January 6, 1987
    Assignee: Aegis, Inc.
    Inventor: Jeremy D. Scherer