Patents Assigned to Aegis, Inc.
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Patent number: 8670470Abstract: A tunable laser includes an optical cavity comprising a first and second mirror. A gain medium is positioned in the optical cavity that generates stimulated emission in the optical cavity when biased. A thermally tunable optical filter is positioned in the optical cavity that is heated to a temperature that selects a desired optical mode of the optical cavity. A thermally tunable optical phase retarder is positioned in the optical cavity that is heated to a temperature which changes an optical path length in the optical cavity by an amount corresponding to a resonant frequency of the tunable optical filter so that a phase-matching condition of the optical cavity is shifted to the desired optical mode of the optical cavity selected by the thermally tunable optical filter.Type: GrantFiled: February 14, 2012Date of Patent: March 11, 2014Assignee: Photop Aegis, Inc.Inventors: Michael Cahill, Rong Sun
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Patent number: 8594498Abstract: An optical signal-to-noise ratio monitor includes a demodulator comprising an input that receives at least a portion of a phase modulated optical signal. The monitor also includes a delay interferometer with a periodic phase control that sweeps a differential delay of one arm of the interferometer through a plurality of differential optical phase shifts. The demodulator converts phase modulated optical signals to intensity modulated optical signals. A tunable optical filter continuously scans a transmission wavelength over a desired wavelength range in a time that allows more than one wavelength to be transmitted through an output of the tunable filter for each of the plurality of differential optical phase shifts. An optical detector detects the filtered optical signal and generates a corresponding electrical demodulation signal at an output. A processor determines an optical signal-to-noise ratio for the more than one wavelength of the optical signal.Type: GrantFiled: September 23, 2008Date of Patent: November 26, 2013Assignee: Photop Aegis, Inc.Inventor: Michael Cahill
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Patent number: 8143717Abstract: A package for use in encapsulating an electronic device is disclosed. The package includes a dielectric frame having first and second sides with a pair of apertures extending through the dielectric frame. These apertures are separated by a raised shelf span extending inwardly from an internal perimeter of the dielectric frame. The raised shelf span defines a first thickness of the dielectric frame and a raised sidewall extending outwardly from the second side along an external perimeter of said dielectric frame defines a second thickness of said frame, with the second thickness being greater than the first thickness. Also provided is a metallic component having a flange and a pedestal that extends perpendicularly from the flange. The flange is bonded to the first side of the dielectric frame and extends across one of the pair of apertures with the pedestal extending into that aperture. A gap between the pedestal and the dielectric frame having a width of at least 0.015 inch.Type: GrantFiled: June 29, 2010Date of Patent: March 27, 2012Assignee: HCC Aegis, Inc.Inventor: Manuel Medeiros, III
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Patent number: 8080872Abstract: A package for use in encapsulating an electronic device is disclosed. In some embodiments, the package includes the following: a dielectric frame having first and second sides, an aperture, a raised shelf portion defined along an internal perimeter of the dielectric frame and extending outwardly from the second side, the raised shelf portion defining a first thickness of the dielectric frame, and a raised sidewall extending outwardly from the second side along an external perimeter of the dielectric frame, the raised sidewall defining a second thickness of the frame, the second thickness being greater than the first thickness; a metallic component bonded to the dielectric frame and extending across the aperture; and a seam weldable, low-profile metallic seal ring bonded to the raised sidewall of the dielectric frame.Type: GrantFiled: June 16, 2009Date of Patent: December 20, 2011Assignee: HCC Aegis, Inc.Inventor: Manuel Medeiros, III
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Patent number: 5188985Abstract: A surface mount package for encapsulating an electronic device is provided. The package has a ceramic frame containing a plurality of apertures. Copper-tungsten composite metallic components are bonded to the ceramic frame and individually extend across each of the apertures. The metallic components may include a flange for bonding and a pedestal extending into each aperture.Type: GrantFiled: April 21, 1992Date of Patent: February 23, 1993Assignee: Aegis, Inc.Inventors: Manuel Medeiros, III, Jay S. Greenspan
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Patent number: 5111277Abstract: A surface mount package for encapsulating an electronic device is provided. The package has a ceramic frame containing a plurality of apertures. Copper-tungsten composite metallic components are bonded to the ceramic frame and individually extend across each of the apertures. The metallic components may include a flange for bonding and a pedestal extending into each aperture.Type: GrantFiled: March 29, 1991Date of Patent: May 5, 1992Assignee: Aegis, Inc.Inventors: Manuel Medeiros, III, Jay S. Greenspan
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Patent number: 4768077Abstract: The present invention is directed to a lead frame having both electrically conductive and electrically non-conductive tie-bar portions. The electrically conductive tie-bar portion allows the attached leads to be simultaneously electroplated, yet is removable from the lead frame, leaving the electrically non-conductive tie-bar portion which provides support for the leads. The advantages to the electrically non-conductive tie-bar portion include substantially decreasing the leads' bending and/or breaking from the package, during both manufacturing and/or testing of the integrated circuit.Type: GrantFiled: February 20, 1986Date of Patent: August 30, 1988Assignee: Aegis, Inc.Inventor: Jeremy D. Scherer
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Patent number: 4649229Abstract: A flat package for electric microcircuits has an iron-nickel-cobalt alloy frame which is brazed to a molybdenum bottom at a temperature below about 400.degree. C. The molybdenum bottom has successive layers of copper, nickel and gold plating.Type: GrantFiled: August 12, 1985Date of Patent: March 10, 1987Assignee: Aegis, Inc.Inventors: Jeremy D. Scherer, Steven A. Tower
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Patent number: 4633573Abstract: A microcircuit package and sealing method in which a non-organic coating is used to hermetically seal the microcircuit. The microcircuit is isolated and insulated in order to protect the microcircuit from the high temperatures required to apply and cure a non-organic coating. The materials and methods used to isolate and insulate the microcircuit are chosen so that the thermal coefficients of the materials are complementary and thus form a highly reliable, durable seal, while also insulating the microcircuit during the process of applying the non-organic coating.Type: GrantFiled: May 23, 1984Date of Patent: January 6, 1987Assignee: Aegis, Inc.Inventor: Jeremy D. Scherer