Abstract: A lateral diffused metal-oxide-semiconductor field-effect transistor structure including a P substrate, an N+ buried layer, an N epitaxial layer, a P well, an N well, a drain region, a source region, and a body region is disclosed. The N+ buried layer is located between the P substrate and the N epitaxial layer, the P well contacts the N+ buried layer, the source region and the body region are located in the P well, the N well is located in the N epitaxial layer, and the drain region is located in the N well. When a high voltage is applied to the drain and the P substrate is grounded, a breakdown voltage with the P substrate is raised because of the N+ buried layer isolating the P substrate from the N epitaxial layer, so as to be able to avoid PN junction breakdown.
Type:
Grant
Filed:
May 6, 2009
Date of Patent:
April 13, 2010
Assignee:
Agamem Microelectronics Inc.
Inventors:
Tsuoe-Hsiang Liao, Bing-Yao Fan, Yi-Ju Liu