Patents Assigned to Agate Logic (Beijing), Inc.
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Patent number: 7994818Abstract: The present invention provides an integrated circuit, comprising an array of components and programmable interconnect network for the array of components, said programmable interconnect network comprising a plurality of switch boxes being connected in a tree-based hierarchical architecture and providing selection and connection for the components responsive to configuration bits, switch boxes located at the lowest level of hierarchy are connected to the components; switch boxes in at least one level of hierarchy have different number of children from those in other levels of hierarchy. The present invention provides a hierarchical architecture with a vast variety of cell numbers, which facilitates circuit implementation. The present invention also offers greater layout flexibility.Type: GrantFiled: June 20, 2007Date of Patent: August 9, 2011Assignee: Agate Logic (Beijing), Inc.Inventors: Fungfung Lee, Wen Zhou
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Patent number: 7928764Abstract: A programmable interconnect network for an array of logic cells. Said interconnect network has a plurality of switch boxes being connected in a tree structure and providing connections to its logic cells, switch boxes located at the lowest level of the tree structure are connected to logic cells; said interconnect network also has peripheral switch boxes, of which at least one is connected to an external logic. Also, an integrated circuit comprising an FP array of logic cells connected by the said programmable interconnect network and a mask programmable (MP) logic array.Type: GrantFiled: August 31, 2006Date of Patent: April 19, 2011Assignee: Agate Logic (Beijing), Inc.Inventors: John Jun Yu, Fungfung Lee, Wen Zhou
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Patent number: 7915917Abstract: The present invention provides integrated circuits with improved logic cells. In one embodiment, an integrated circuit having a plurality of logic cells (LC) is provided, each LC comprising: a lookup table having a LUT output terminal; and, a first multiplexer; wherein, a first multiplexer input terminal is connected to of a first input terminal of the LC, a second multiplexer input terminal is connected to the LUT output terminal, a multiplexer output terminal is connected to a first output terminal of the LC, and a multiplexer select terminal is connected to a second input terminal of the LC so as to select which of the signals appearing at the first and second multiplexer input terminal to pass through; wherein, by coupling in chain the first input terminal of one LC to the first output terminal of another LC, a WLUT chain is formed.Type: GrantFiled: April 2, 2010Date of Patent: March 29, 2011Assignee: Agate Logic (Beijing), Inc.Inventors: Fung Fung Lee, Wen Zhou
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Patent number: 7911228Abstract: The present invention provides integrated circuits with improved logic cells. In one embodiment, an integrated circuit having a plurality of logic cells (LC) is provided, each LC comprising: a lookup table having a LUT output terminal; and, a first multiplexer; wherein, a first multiplexer input terminal is connected to of a first input terminal of the LC, a second multiplexer input terminal is connected to the LUT output terminal, a multiplexer output terminal is connected to a first output terminal of the LC, and a multiplexer select terminal is connected to a second input terminal of the LC so as to select which of the signals appearing at the first and second multiplexer input terminal to pass through; wherein, by coupling in chain the first input terminal of one LC to the first output terminal of another LC, a WLUT chain is formed.Type: GrantFiled: April 2, 2010Date of Patent: March 22, 2011Assignee: Agate Logic (Beijing), Inc.Inventors: Fung Fung Lee, Wen Zhou
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Publication number: 20100219860Abstract: The present invention provides integrated circuits with improved logic cells. In one embodiment, an integrated circuit having a plurality of logic cells (LC) is provided, each LC comprising: a lookup table having a LUT output terminal; and, a first multiplexer; wherein, a first multiplexer input terminal is connected to of a first input terminal of the LC, a second multiplexer input terminal is connected to the LUT output terminal, a multiplexer output terminal is connected to a first output terminal of the LC, and a multiplexer select terminal is connected to a second input terminal of the LC so as to select which of the signals appearing at the first and second multiplexer input terminal to pass through;wherein, by coupling in chain the first input terminal of one LC to the first output terminal of another LC, a WLUT chain is formed.Type: ApplicationFiled: April 2, 2010Publication date: September 2, 2010Applicant: AGATE LOGIC (BEIJING), INC.Inventors: Fung Fung Lee, Wen Zhou
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Patent number: 7719311Abstract: The present invention provides integrated circuits with improved logic cells. In one embodiment, an integrated circuit having a plurality of logic cells (LC) is provided, each LC comprising: a lookup table having a LUT output terminal; and, a first multiplexer; wherein, a first multiplexer input terminal is connected to of a first input terminal of the LC, a second multiplexer input terminal is connected to the LUT output terminal, a multiplexer output terminal is connected to a first output terminal of the LC, and a multiplexer select terminal is connected to a second input terminal of the LC so as to select which of the signals appearing at the first and second multiplexer input terminal to pass through; wherein, by coupling in chain the first input terminal of one LC to the first output terminal of another LC, a WLUT chain is formed.Type: GrantFiled: May 20, 2009Date of Patent: May 18, 2010Assignee: Agate Logic (Beijing), Inc.Inventors: Fung Fung Lee, Wen Zhou
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Publication number: 20090289661Abstract: The present invention provides in a first aspect a programmable interconnect network for an array of logic blocks, which comprises a plurality of switch boxes being connected in a tree-based hierarchical architecture and providing selection and connection for the logic blocks, switch boxes located at the lowest level of the tree structure are connected to the logic blocks; wherein said network comprises a crosslink established between two of said plurality of switch boxes. The present invention helps implement functions with more area and timing efficiency and/or placement-friendliness.Type: ApplicationFiled: May 8, 2009Publication date: November 26, 2009Applicant: AGATE LOGIC (BEIJING), INC.Inventors: Fung Fung Lee, Wen Zhou