Patents Assigned to Agere System Inc.
  • Patent number: 8205147
    Abstract: A structured interleaving/de-interleaving scheme enables efficient implementation of encoding/decoding based on two-dimensional product codes (2D PC). An encoder has an integrated architecture that performs structured interleaving and PC coding in an integrated manner in which locations in the interleaved data stream are related to row and column indices for the 2D PC coding based on closed-form expressions. In one embodiment, a corresponding decoder implements two-stage low-density parity-check (LDPC) decoding based on the same relationships between locations in the interleaved data stream and row and column indices for the LDPC decoding.
    Type: Grant
    Filed: August 11, 2008
    Date of Patent: June 19, 2012
    Assignee: Agere Systems Inc.
    Inventors: Xiaotong Lin, Fan Zhou
  • Patent number: 8204261
    Abstract: An input audio signal having an input temporal envelope is converted into an output audio signal having an output temporal envelope. The input temporal envelope of the input audio signal is characterized. The input audio signal is processed to generate a processed audio signal, wherein the processing de-correlates the input audio signal. The processed audio signal is adjusted based on the characterized input temporal envelope to generate the output audio signal, wherein the output temporal envelope substantially matches the input temporal envelope.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: June 19, 2012
    Assignees: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V., Agere Systems Inc.
    Inventors: Eric Allamanche, Sascha Disch, Christof Faller, Juergen Herre
  • Patent number: 8201032
    Abstract: A generalized hardware architecture that supports built-in self testing (BIST) for a range of different computer memory configurations and a generalized BIST algorithm can be compiled, based on specified configuration characteristics (e.g., the number of write ports, the number of read ports, the number of entries, and the number of bits per entry in the computer memory), to generate the hardware design for a particular computer memory system. In one embodiment, the generalized hardware architecture includes a multiplexer block that enables a single BIST comparator to be multiplexed for use in performing BIST testing via different read ports of the computer memory.
    Type: Grant
    Filed: July 11, 2007
    Date of Patent: June 12, 2012
    Assignee: Agere Systems Inc.
    Inventors: Donald A. Evans, Ilyoung Kim
  • Patent number: 8200280
    Abstract: A cordless telephone which allows a user to play MP3 digital audio bit stream music, using the remote handset of a cordless telephone to control the functions of the MP3 player. The cordless telephone remains usable as a typical cordless telephone with all the features and conveniences of a cordless telephone including, but not limited to, connection of a telephone call between a calling party and a called party, caller ID information, voice messaging features, etc. MP3 digital audio bit stream music may be downloaded from a remote source through, e.g., the Internet and a PC.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: June 12, 2012
    Assignee: Agere Systems Inc.
    Inventors: Qinghong Cao, Liang Jin, Wenzhe Luo, Jian Wu, Zhigang Ma
  • Patent number: 8200500
    Abstract: Generic and specific C-to-E binaural cue coding (BCC) schemes are described, including those in which one or more of the input channels are transmitted as unmodified channels that are not downmixed at the BCC encoder and not upmixed at the BCC decoder. The specific BCC schemes described include 5-to-2, 6-to-5, 7-to-5, 6.1-to-5.1, 7.1-to-5.1, and 6.2-to-5.1, where “0.1” indicates a single low-frequency effects (LFE) channel and “0.2” indicates two LFE channels.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: June 12, 2012
    Assignee: Agere Systems Inc.
    Inventors: Frank Baumgarte, Jiashu Chen, Christof Faller
  • Patent number: 8196006
    Abstract: A turbo decoder that calculates alpha, beta and gamma (branch metric) values does not normalize the branch metric but instead applies the normalization factor to the newly calculated extrinsic values before writing them to interleaving memory, resulting in use of less memory than in prior turbo decoders. A compensating factor is applied when the extrinsics are read from interleaving memory. The absence of normalization in the gamma calculation not only conserves memory but also enhances decoder sensitivity.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: June 5, 2012
    Assignee: Agere Systems, Inc.
    Inventors: Mark Andrew Bickerstaff, Benjamin John Widdup
  • Patent number: 8196002
    Abstract: Various embodiments of the present invention provide systems and methods for LDPC encoding and decoding. For example, a system for performing LDPC encoding and decoding is disclosed that includes a joint LDPC encoder/decoder. The joint LDPC encoder/decoder includes both an LDPC decoder and an LDPC encoder that each utilize a common LDPC decoder circuit to perform the respective functions of encoding and decoding.
    Type: Grant
    Filed: June 1, 2007
    Date of Patent: June 5, 2012
    Assignee: Agere Systems Inc.
    Inventor: Nils Graef
  • Patent number: 8194792
    Abstract: The present invention enhances the performance of a clock and data recovery (CDR) circuit by employing look-ahead techniques to produce a low latency timing adjustment. In one example of the invention employed in a CDR circuit having a decimation filter processing the CDR's phase detector output, the invention uses the most significant bits of the decimation filter output to quickly determine a look-ahead adjustment.
    Type: Grant
    Filed: January 5, 2005
    Date of Patent: June 5, 2012
    Assignee: Agere Systems Inc.
    Inventors: Pervez Mirza Aziz, Necip Sayiner
  • Patent number: 8194771
    Abstract: A method and apparatus are disclosed for transmitting symbols in a multiple antenna communication system. The disclosed frame structure comprises a preamble having a plurality of long training symbols that are transmitted on a plurality transmit antennas. At least a portion of the frame is delayed on at least one transmit antenna. The disclosed frame formats of the present invention are backwards compatible to existing single antenna communication systems. The delay amount, D, can be approximately equal to one OFDM time sample period, T. The delayed version can be obtained by introducing a time delay into a signal on the delayed branch(es) or by cyclically shifting at least a portion of each frame on the delayed branch(es). The entire frame or only the preamble portion of each frame can be delayed.
    Type: Grant
    Filed: November 16, 2004
    Date of Patent: June 5, 2012
    Assignee: Agere Systems Inc.
    Inventors: Joachim S. Hammerschmidt, Robert John Kopmeiners, Xiaowen Wang
  • Publication number: 20120135720
    Abstract: A method of using an intercom on a cordless telephone during an active call. The active call is put on hold while the intercom is in use. Once the call is re-activated, the intercom is shut off. This system may be designed for a cordless telephone with one handset or a plurality of handsets.
    Type: Application
    Filed: February 7, 2012
    Publication date: May 31, 2012
    Applicant: Agere Systems Inc.
    Inventors: Joseph M. Cannon, James A. Johanson
  • Patent number: 8191067
    Abstract: A method and apparatus are disclosed for establishing a bound on the effect of task interference in an instruction cache shared by multiple tasks. The bound established by the present invention is the maximum number of “live” frames of a given task that are coexistent during the execution of an application. A “live cache frame” contains a block that is accessed in the future without an intervening eviction. The eviction of blocks from a live frame by an interrupt causes a future miss that would not otherwise occur and evictions from live frames are the only evictions that cause misses that would not otherwise occur. The invention provides a more accurate estimate of the maximum additional execution time of a task that results from servicing an interrupt during its execution. Additional accuracy is obtained by exploiting knowledge of the character of an intervening task to achieve a tighter bound, when possible.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: May 29, 2012
    Assignee: Agere Systems Inc.
    Inventors: Michael Richard Betker, Harry Dwyer, John Susantha Fernando
  • Patent number: 8189704
    Abstract: A method and apparatus are provided for joint equalization and decoding of multilevel codes, such as the Multilevel Threshold-3 (MLT-3) code, which are transmitted over dispersive channels. The MLT-3 code is treated as a code generated by a finite-state machine using a trellis having state dependencies between the various states. A super trellis concatenates the MLT-3 trellis with a trellis representation of the channel. Joint equalization and decoding of the received signal can be performed using the super trellis. A sequence detector is disclosed that uses the super trellis or a corresponding reduced-state trellis to perform joint equalization and decoding of the received signal to decode the MLT-3 coded data bits. The sequence detector may be embodied using maximum likelihood sequence estimation that applies the optimum Viterbi algorithm or a reduced complexity sequence estimation method, such as the reduced-state sequence estimation (RSSE) algorithm.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: May 29, 2012
    Assignee: Agere Systems Inc.
    Inventors: Kameran Azadet, Erich Franz Haratsch
  • Patent number: 8183698
    Abstract: According to certain embodiments, integrated circuits are fabricated using brittle low-k dielectric material to reduce undesired capacitances between conductive structures. To avoid permanent damage to such dielectric material, bond pads are fabricated with support structures that shield the dielectric material from destructive forces during wire bonding. In one implementation, the support structure includes a passivation structure between the bond pad and the topmost metallization layer. In another implementation, the support structure includes metal features between the topmost metallization layer and the next-topmost metallization layer. In both cases, the region of the next-topmost metallization layer under the bond pad can have multiple metal lines corresponding to different signal routing paths.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: May 22, 2012
    Assignee: Agere Systems Inc.
    Inventors: Joze E. Antol, John W. Osenbach, Kurt G. Steiner
  • Patent number: 8180600
    Abstract: In one embodiment, the invention is a method for modeling electrical behavior of a packaged module having multiple integrated circuits (ICs), such as a multi-chip module (MCM). The method includes: (a) identifying one or more pin groups in the module, wherein a pin group comprises two or more buffers connected together and to a package-external pin, and (b) generating one or more corresponding unified behavioral models for the one or more pin groups based on the characteristics of the buffers of the one or more pin groups. The behavioral models are part of an integrated behavioral model file in accordance with the I/O buffer information specification (IBIS) standard.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: May 15, 2012
    Assignee: Agere Systems Inc.
    Inventors: James D. Chlipala, Makeshwar Kothandaraman, Nirav Patel, Venu Babu Ummalaneni
  • Patent number: 8180061
    Abstract: The purpose of the invention is to bridge the gap between parametric multi-channel audio coding and matrixed-surround multi-channel coding by gradually improving the sound of an up-mix signal while raising the bit-rate consumed by the side-information starting from 0 up to the bit-rates of the parametric methods. More specifically, it provides a method of flexibly choosing an “operating point” somewhere between matrixed-surround (no side-information, limited audio quality) and fully parametric reconstruction (full side-information rate required, good quality). This operating point can be chosen dynamically (i.e. varying over time) and in response to the permissible side-information rate, as it is dictated by the individual application.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: May 15, 2012
    Assignees: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V., Agere System, Inc.
    Inventors: Johannes Hilpert, Christof Faller, Karsten Linzmeier, Ralph Sperschneider
  • Patent number: 8181258
    Abstract: Techniques are disclosed for generating a representation of an access control list, the representation being utilizable in a network processor or other type of processor to perform packet filtering or other type of access control list based function. A plurality of rules of the access control list are determined, each of at least a subset of the rules having a plurality of fields and a corresponding action, and the rules are processed to generate a multi-level tree representation of the access control list, in which each of one or more of the levels of the tree representation is associated with a corresponding one of the fields. At least one level of the tree representation other than a root level of the tree representation comprises a plurality of nodes, with at least two of the nodes at that level each having a separate matching table associated therewith.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: May 15, 2012
    Assignee: Agere Systems Inc.
    Inventors: Vinoj N. Kumar, Narender R. Vangati
  • Patent number: 8176367
    Abstract: Various embodiments of the present invention provide systems and methods for managing solid state drives. As an example, a storage system is described that include at least a first flash memory block and a second flash memory block, and a control circuit. The first flash memory block and the second flash memory block are addressable in the storage system. The control circuit is operable to identify the first flash memory block as partially failed, receive a write request directed to the first flash memory block; and direct the write request to the second flash memory block.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: May 8, 2012
    Assignee: Agere Systems Inc.
    Inventors: David L. Dreifus, Robert W. Warren, Brian McKean
  • Patent number: 8174784
    Abstract: Various embodiments of the present invention provide systems and methods for controlling access to a magnetic storage medium. As one example, a method for controlling access to a magnetic storage medium is disclosed that includes providing a location count indicating a location between a portion of a first servo data sector of a magnetic storage media and a portion of a second servo data sector of the magnetic storage media, and asserting an enable window signal based upon the location count.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: May 8, 2012
    Assignee: Agere Systems Inc.
    Inventors: Jeffrey P. Grundvig, Richard Rauschmayer, Timothy T. Ding
  • Patent number: 8175179
    Abstract: In one embodiment, the present invention is a method for reducing the peak-to-average power ratio (PAPR) of a multi-carrier modulated symbol, such as an orthogonal frequency division multiplexed (OFDM) symbol. The method first transforms a set of data symbols into a multi-carrier modulated symbol. The method then uses the multi-carrier modulated symbol and a gradient-descent algorithm to generate a set of symbols for PAPR-reduction tones. The data symbols and the PAPR-reduction symbols are then transformed to generate an updated multi-carrier modulated symbol. The PAPR-reduction symbols are iteratively updated until a terminating condition occurs (e.g., an acceptable PAPR is achieved for the multi-carrier modulated symbol).
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: May 8, 2012
    Assignee: Agere Systems Inc.
    Inventors: Jayant Baliga, Alexander J. Grant, Adriel P. Kind, Graeme K. Woodward
  • Patent number: 8175562
    Abstract: An apparatus including automatic gain control (AGC) includes at least one variable gain amplifier (VGA) operative to receive an input signal and to generate an amplified signal. A gain of the VGA is controlled as a function of at least a first control signal. The apparatus further includes an AGC circuit coupled to the VGA and being operative to generate the first control signal. The AGC circuit has a bandwidth that is controlled as a function of at least the amplified signal and a second control signal, the second control signal being indicative of a motion of the apparatus.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: May 8, 2012
    Assignee: Agere Systems Inc.
    Inventors: Roger A. Fratti, Xiao-an Wang