Patents Assigned to Agere Systems
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Patent number: 8949701Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.Type: GrantFiled: February 8, 2012Date of Patent: February 3, 2015Assignee: Agere Systems Inc.Inventors: Yang Cao, Scott M. Dziak, Nayak Ratnakar Aravind, Richard Rauschmayer, Weijun Tan
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Patent number: 8906114Abstract: A method and apparatus are disclosed for detecting the removal of a device connected to a network. The present invention generates an alarm on a protected device when an unauthorized user disconnects the device from a network connection. The network connection is monitored and an alarm is generated if the protected device is disconnected from the network connection without proper notification to the theft protection utility. A number of fail-safe features can optionally be employed to ensure that the theft protection aspects of the present invention are not bypassed. For example, the theft protection utility process can employ speaker, volume and/or power control features to ensure that the alarms generated by the present invention, or the theft protection feature itself, cannot be bypassed.Type: GrantFiled: May 18, 2009Date of Patent: December 9, 2014Assignee: Agere Systems LLCInventors: Jalaludeen Ca, Nandakumar Gn
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Patent number: 8908812Abstract: Methods and apparatus are provided for high-speed, low-power, high-performance channel detection. A soft-output detector is provided for processing a received signal, comprising: a forward detector for calculating forward state metrics; a backward detector for calculating backward state metrics; and a current branch detector for calculating a current branch metric, wherein at least two of the forward detector, the backward detector and the current branch detector employ trellis structures with a different number of states. A method is provided for processing a received signal using a soft-output detector, comprising: calculating forward state metrics using a forward detector; calculating backward state metrics using a backward detector; and calculating a current branch metric using a current branch detector, wherein at least two of the forward detector, the backward detector and the current branch detector employ trellis structures with a different number of states.Type: GrantFiled: January 8, 2013Date of Patent: December 9, 2014Assignee: AGERE Systems LLCInventors: Kelly K. Fitzpatrick, Erich F. Haratsch
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Patent number: 8902963Abstract: Methods and apparatus are provided for determining the threshold position of one or mote DFE latches using an evaluation of the incoming data eye. A threshold position is determined for one or more transition latches employed by a decision-feedback equalizer by obtaining a plurality of samples of a data eye using a data eye monitor; obtaining a vertical eye opening metric from the data eye monitor; and determining the threshold position for the one or more transition latches based on the vertical eye opening metric. A decision-feedback equalizer is also disclosed that comprises at least one data latch having a data threshold; and at least one transition latching having a transition threshold, wherein the transition threshold and the data threshold ate unequal.Type: GrantFiled: September 28, 2007Date of Patent: December 2, 2014Assignee: Agere Systems Inc.Inventors: Pervez M Aziz, Mohammad S Mobin
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Patent number: 8890338Abstract: A chip and a method of fabricating the chip for low cost chip identification circuitry. In one embodiment, a method of manufacturing an integrated circuit includes formation of a multi-level metallization structure including a pad level comprising programming pads. A plurality of active devices are formed on a substrate, and multiple levels of metallization are formed over the active devices, connecting some of the active devices to form programmable circuitry. The programmable circuitry is connected to pairs of programming pads on the bond pad level. Programming pads in some of the pairs are selectively connected to one another by using conductive ink deposited with maskless inkjet printing techniques. The pads are then covered with a non-conductive protective layer.Type: GrantFiled: September 27, 2006Date of Patent: November 18, 2014Assignee: Agere Systems, Inc.Inventor: Edward B. Harris
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Patent number: 8872311Abstract: The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the semiconductor device. The semiconductor device, in one particularly advantageous embodiment, includes a multi layer etch stop located over a substrate, wherein the multi layer etch stop has a first insulative layer and a second silicon-rich nitride layer located over the first insulative layer. Located over the multi layer etch stop is a dielectric layer having an opening formed therein that extends through at least a portion of the multi layer etch stop. A conductive plug is typically located within the opening, wherein an insulative spacer is located between the conductive plug and the second silicon-rich nitride layer.Type: GrantFiled: February 13, 2004Date of Patent: October 28, 2014Assignee: Agere Systems Inc.Inventors: Nace Rossi, Alvaro Maury
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Patent number: 8875005Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.Type: GrantFiled: February 8, 2012Date of Patent: October 28, 2014Assignee: AGERE Systems Inc.Inventors: Yang Cao, Scott M. Dziak, Nayak Ratnakar Aravind, Richard Rauschmayer, Weijun Tan
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Patent number: 8867182Abstract: The invention provides a signal-powered integrated circuit (IC). The IC comprises an integrated circuit die including a ground node, a supply node, and a first terminal for receiving a digital data signal having data content and a predetermined energy. A receive buffer formed on the integrated circuit die is connected to the first terminal and capable of receiving the data content associated with the digital data signal. A rectifier is also formed on the integrated circuit die. The rectifier includes a first diode connected between the first terminal and the ground node and a second diode connected between the first terminal and the supply node. The rectifier is configured to rectify the digital data signal and pass at least a portion of the digital data signal's predetermined energy to the supply node. Each of the first and second diodes is capable of withstanding an ESD impulse.Type: GrantFiled: June 7, 2010Date of Patent: October 21, 2014Assignee: Agere Systems Inc.Inventors: Boris A. Bark, Brad L. Grande, Peter Kiss, Johannes G. Ransijn, James D. Yoder
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Patent number: 8859395Abstract: Techniques for processing power transistor devices are provided. In one aspect, the curvature of a power transistor device comprising a device film formed on a substrate is controlled by thinning the substrate, the device having an overall residual stress attributable at least in part to the thinning step, and applying a stress compensation layer to a surface of the device film, the stress compensation layer having a tensile stress sufficient to counterbalance at least a portion of the overall residual stress of the device. The resultant power transistor device may be part of an integrated circuit.Type: GrantFiled: November 30, 2009Date of Patent: October 14, 2014Assignee: Agere Systems LLCInventors: Roger A. Fratti, Warren K. Waskiewicz
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Patent number: 8861580Abstract: Methods and apparatus are provided for determining one or more channel compensation parameters based on data eye monitoring. According to one aspect of the invention, a method is provided for evaluating the quality of a data eye associated with a signal. The received signal is sampled for a plurality of different phases, for example, using at least two latches, and the samples are evaluated to identify when the signal crosses a predefined amplitude value, such as a zero crossing. It is determined whether the points of predefined amplitude crossing satisfy one or more predefined criteria. One or more parameters of one or more channel compensation techniques can optionally be adjusted based on a result of the determining step. One or more parameters of an adjacent transmitter can also be adjusted to reduce near end cross talk based on a result of the determining step.Type: GrantFiled: May 16, 2006Date of Patent: October 14, 2014Assignee: Agere Systems LLCInventors: Christopher J. Abel, Mohammad S. Mobin, Gregory W. Sheets, Lane A. Smith
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Patent number: 8861515Abstract: Generally, a method and apparatus are disclosed that store sequential data units of a data packet received at an input port in contiguous banks of a buffer in a shared memory, thereby obviating any need for storing linkage information between data units. Data packets can extend through multiple buffers (next-buffer linkage information is much more efficient than next-data-unit linkage information). According to another aspect of the invention, buffer memory utilization can be further enhanced by storing multiple packets in a single buffer. For each buffer, a buffer usage count is stored that indicates the sum (over all packets represented in the buffer) of the number of output ports toward which each of the packets is destined.Type: GrantFiled: April 21, 2004Date of Patent: October 14, 2014Assignee: Agere Systems LLCInventors: Chung Kuang Chin, Yaw Fann, Roy T. Myers, Jr.
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Patent number: 8854758Abstract: A method and apparatus for storing a disk drive media defect table or list. Defect table entries for a subject disk track are stored on the subject track and retrieved for determining defective sectors only when the subject track is accessed for a data read or write operation.Type: GrantFiled: May 19, 2006Date of Patent: October 7, 2014Assignee: AGERE Systems Inc.Inventors: Walter Allen, Robert Alan Reid
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Publication number: 20140284376Abstract: A method of forming an electronic device, comprising providing a semiconductor substrate having a first contact and an undoped electroplated lead-free solder bump formed on the first contact. The method also comprises providing a device package substrate having a second contact and a doped lead-free solder layer on the second contact comprising a fourth row transition metal dopant. The method further comprises melting the solder bump and the solder layer while the solder layer and the solder bump are in contact, thereby forming a doped solder bump consisting essentially of Sn, one or both of Ag and Cu, and the fourth row transition metal dopant.Type: ApplicationFiled: June 3, 2014Publication date: September 25, 2014Applicant: Agere Systems LLCInventors: Mark Bachman, John W. Osenbach
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Patent number: 8843813Abstract: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a data transfer system is disclosed that includes a data detector, a defect detector and a gating circuit. The data detector provides a soft output, and the defect detector is operable to receive the soft output and the data signal, and to assert a defect indication based at least in part on the soft output and the data signal. The gating circuit is operable to modify the soft output of the detector whenever the defect indication is asserted.Type: GrantFiled: May 25, 2013Date of Patent: September 23, 2014Assignee: AGERE Systems IncInventor: Weijun Tan
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Patent number: 8842758Abstract: In one embodiment, an algorithm dynamically selects a method for reducing distortion in a multi-carrier modulated signal, such as an orthogonal frequency division multiplexing (OFDM) signal. The algorithm directs a transmitter to transmit peak-to-average power ratio (PAPR)-reduction signals over reserved tones (i.e., frequencies) if reserved tones are available. If reserved tones are not available, then the algorithm directs the transmitter to transmit PAPR-reduction symbols over free tones if free tones are available. If the free tones for this transmitter are used by adjacent transmitters, then interference-reduction techniques may be used to reduce interference with the adjacent transmitters. If reserved tones and free tones are not available, then the transmitter may use an alternative method to reduce distortion, such as successive clipping and filtering. In another embodiment, the transmitter may transmit PAPR-reduction symbols over both free and reserved tones, if available.Type: GrantFiled: December 4, 2012Date of Patent: September 23, 2014Assignee: Agere Systems LLCInventor: Graeme Woodward
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Publication number: 20140270122Abstract: The invention provides a communication protocol and serial interface having an approximately fixed interface clock and capable of accommodating a variety of communication rates. The interface employs a variable-length frame that may be expanded or reduced to obtain a desired communication rate, even though the interface clock rate is held approximately constant. The invention further provides a method for designing an agile barrier interface. In particular, the barrier clock rate is preferably selected to be an approximate common multiple of the various communication rates that the barrier interface must handle. The frame length corresponding to each communication rate may then be obtained by dividing the barrier clock rate by the ?? rate. Finally, the invention provides an agile barrier capable of communicating data across a serial interface at a variety of data rates and at an approximately fixed interface clock rate.Type: ApplicationFiled: May 30, 2014Publication date: September 18, 2014Applicant: Agere Systems LLCInventors: King-Hon Lau, Johannes G. Ransjin, Harold T. Simmonds, James D. Yoder
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Publication number: 20140256364Abstract: A method of using an intercom on a cordless telephone during an active call. The active call is put on hold while the intercom is in use. Once the call is re-activated, the intercom is shut off. This system may be designed for a cordless telephone with one handset or a plurality of handsets.Type: ApplicationFiled: December 4, 2013Publication date: September 11, 2014Applicant: Agere Systems Inc.Inventors: Joseph M. Cannon, James A. Johanson
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Patent number: 8831603Abstract: A method of operating a communications circuit with at least one control channel and at least one data channel includes the steps of monitoring the at least one control channel, powering a receiver portion of the circuit when the at least one control channel indicates that data is to be received, and refraining from powering the receiver portion when the at least one control channel indicates that data is not to be received. The circuit can operate, for example, under the 3GPP HSDPA standard. Where desired, the clock and power supply to the receiver portion and a bit rate processing portion can be independently gated.Type: GrantFiled: June 30, 2006Date of Patent: September 9, 2014Assignee: Agere Systems LLCInventors: Christopher John Nicol, Oliver Ridler, Charles Nicholas Alexander Thomas
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Patent number: 8819682Abstract: A method and system for launching multiple applications simultaneously on a device under the control of application switching framework so that the operating system is only running one task for all the applications is provided. A single task is run under the control of an operating system. An application manager is run within the task. One or more applications are launched within the task under the control of the application manager. One of the applications is made the current application by switching, under user control, among the launched applications. A list of application descriptors is maintained for all the launched applications, and when switching, the application descriptor of one of the applications is used for displaying the application to a user on a screen. Each application descriptor contains forms of the launched applications. Each of the application descriptors contains a tree of forms with one root or parent form. A form represents an image to be displayed to the user.Type: GrantFiled: January 23, 2007Date of Patent: August 26, 2014Assignee: Agere Systems LLCInventors: Nitin Kumar Agarwal, Michael Cronin, Nisha Patel
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Patent number: 8811927Abstract: In one embodiment, a receiver is provided for use in a multiple-input system that includes a receiving antenna receiving a time-domain signal corresponding to a plurality of signals transmitted from a plurality of transmitting antennas. The receiver includes: (a) a transform unit adapted to transform the time-domain signal into a frequency-domain signal; (b) a channel estimation unit adapted to estimate, based on the frequency-domain signal and a frequency-domain pilot signal, a combined transfer function corresponding to a plurality of transfer functions of respective channels between the plurality of transmitting antennas and the receiving antenna; and (c) a channel separation unit including a plurality of frequency-domain convolution units that separate the combined transfer function into a plurality of estimated channel transfer functions.Type: GrantFiled: August 16, 2013Date of Patent: August 19, 2014Assignee: Agere Systems LLCInventors: Kameran Azadet, Samer Hijazi, Sunitha Kopparthi, Albert Molina, Ramon Sanchez