Abstract: A method and apparatus for use with a multichannel receiver to eliminate signal sidelobes within a received signal time frame is disclosed. The elimination of signal sidelobes within a channelized receiver is accomplished by using an analog preprocessor. The analog preprocessor is capable of producing an amplitude mask based upon the determination of the greatest amplitude and frequency channel in a two-dimensional receiver system or frequency channel and time slot in a three-dimensional receiver system signal. The amplitude mask covers a predefined space in time and frequency equal to or below the peak signal amplitude. A signal in the frequency/time cell space covered by the mask must have a magnitude exceeding the magnitude of the amplitude mask in order for the signal to pass through the analog preprocessor for further processing.

Abstract: A coaxial-to-coplanar waveguide connector is used for interconnecting stripline compatible devices utilizing coaxial cable. The connector is formed at the end of a length of coaxial cable embedded within a circuit board. The connector generally has a substantially semi-circular connection section. The connection section includes a conductor partly surrounded by an electrically insulative dielectric which is partly surrounded by a shield. An electrically conductive sheet is used to couple the shield to a ground plane of the circuit board. Electrically conductive ribbon is connect the conductor to a stripline compatible device. The coaxial-to-coplanar waveguide connector may be fabricated by coating a dielectric board with an adhesive material and then routing a length of miniature coaxial cable in the adhesive. Conductive material and dielectric material are consecutively laid upon the dielectric cable board.

Abstract: A direct digitally synthesizer-based, injection locked oscillator includes a direct digital synthesizer for generating a digitally synthesized signal at frequency f.sub.0, an analog oscillator circuit for generating an analog signal at frequency f.sub.1 and a filter coupled to the direct digital synthesizer for filtering the digitally synthesized signal to provide a signal at frequency Nf.sub.0. N may be an integer from 1 to 10. Also included is a coupler to couple the filtered, digitally synthesized signal into the analog oscillator to lock the frequency of the analog output signal to the frequency of the digitally synthesized signal such that the frequency f.sub.1 is equal to the frequency Nf.sub.0. The coupler also electrically couples the analog signal from the analog oscillator circuit to a second filter to filter the analog signal. An amplifier electrically coupled to the second filter amplifies the filtered signal to provide an analog oscillator output signal.

Abstract: Integrated circuit structure and processing is provided for a high power limiter including at least a first anti-parallel array of monolithically integrated Schottky diodes. In a further embodiment, integrated circuit structure and processing is provided for an MMIC, microwave and millimeter wave monolithic integrated circuit, including an amplifier and a high power limiter monolithically integrated on the same substrate.

Abstract: An imaging ball lens for wide field of view applications includes three elements. A first element is a plano-convex lens element with a convex and planar surface, the convex surface positioned facing an object side of the lens. The second plano-convex lens element has a convex and a planar surface. The planar surface of the second lens element is positioned facing the object side of the lens such that it is optically coupled to the planar surface of the first lens element. Also included is a plano-concave fiber optic faceplate with a concave and a planar surface. The concave surface of the faceplate is optically coupled to the convex surface of the second lens element facing the object side of the lens such that it is optically immersed with the fiber optic faceplate.

Abstract: A photon emitting high speed event detector provides for the optimum detection and location of high speed events such as strobe light sources, pulsed laser, gunfire, and lightning. The detector includes a focal plane array, a control circuit and a cueing sensor. The focal plane array is capable of receiving and storing photons which are emitted from a device. The focal plane array is continuously switched by the control circuit between an integrate (charging) and non-integrate (clearing) state until a high speed event is detected by the cueing sensor. During the charging state, incident photon energy is stored by the focal plane array. Upon detection of an event, the cueing sensor instructs the control circuit to hold the focal plane array in the integrate state and the control circuit reads out the stored charge which can be provided to a video monitor for display.

Abstract: An adaptive probabilistic neural network (APNN) includes a cluster processor circuit which generates a signal which represents a probability density function estimation value which is used to sort input pulse parameter data signals based upon a probability of obtaining a correct match with a group of input pulse parameter data signals that have already been sorted. In the APNN system, a pulse buffer memory circuit is contained within the cluster processor circuit and temporarily stores the assigned input pulse parameter data signals. The pulse buffer memory circuit is initially empty. As the input pulse parameter data signals are presented to the APNN, the system sorts the incoming data signals based on the probability density function estimation value signal generated by each currently operating cluster processor circuit. The current input pulse parameter data signal is sorted and stored in the pulse buffer memory circuit of the cluster processor circuit.

Abstract: An electronic recognition unit indicates that a flow of received information is starting when a desired bi-phased pulsed ratio signal starts to be received. The recognition unit discriminates against both noise and spurious radio signals. Desired signals are made recognizable by reversing, upon transmission, the phase of the carrier for a prescribed pattern of pulses. This technique prevents responding to unqualified continuous-wave signals. The relative phases of adjacent radio-frequency pulses of the desired pulse train convey the recognition information. When the phases of two adjacent pulses are the same a positive audio-pulse output is obtained, and if their phases differ by 180 degrees the output is negative. For a predetermined number of pulses, for example fourteen, the resulting positive and negative audio pulses are added in an audio delay circuit with appropriate inversion of the sign of the intentionally negative pulses.

Abstract: In a communications-receiving system for demodulating phase-coded signals and displaying the resultant information on a cathode-ray tube (CRT), an information code is modulated on a carrier by shifting the phase of the carrier by an integral multiple of predetermined phase step. At the receiver a locally generated reference signal is compared with received pulses to ascertain their phase offsets. The resulting demodulated information is presented in a CRT display that indicates not only the received information but also, by the slope of bright dots, the frequency difference between the local reference and the signal, so that frequency drift can be corrected. The CRT's horizontal sweep represents time and the vertical sweep represents phase angle. The start of each vertical sweep is synchronized with zero-crossings of the locally generated reference signal. The intensity of the CRT beam is controlled by the message.

Abstract: An integrated multivisual expert system maintenance advisor system includes an expert system module, a photo-library module and a hypermanual module. The photo-library module and the hypermanual module are linked to each other and to the expert system module. The expert system module utilizes backward and forward chaining "if-then" program rule logic. The rule logic allows for computer program inference reasoning using maintenance technician entered failure systems. The photo-library module includes digitized photograph display processor programming in which magnetically stored digitized photographs are retrieved and processed. The hypermanual module allows instantaneous search and retrieveal of visual display screen of ASCII text character strings by either direct topic search keys or by related or indirect topic search keys, and provides repair and replacement information to the maintenance technician.

Abstract: A Q enhanced dielectric resonator circuit includes a metal enclosure having interior walls defining a chamber. Secured to at least two interior walls is a dielectric substrate. Flatly mounted to at least one side of the dielectric substrate is a substrate stripline. A dielectric resonator is secured to the dielectric substrate at a selected distance from the substrate stripline. The dielectric substrate is positioned a sufficient distance from a ground plane such that the magnetic field lines of the dielectric resonator do not significantly interact with the ground plane. The dielectric resonator is also positioned such that there is substantial coupling of the magnetic field lines of the dielectric resonator with the magnetic field lines of the substrate stripline.

Abstract: An ultraminiature delay line assembly for use with an electronic system. The delay line is utilized for producing and introducing a known controllable time delay to an electrical signal without the accompanying signal attenuation normally associated with traditional coaxial delay lines. The ultraminiature delay line utilizes miniature coaxial transmission cable which is smaller in diameter than the coaxial transmission cable traditionally used. An ultraminiature delay line includes a thin substrate supporting base plate. Mounted on the thin substrate supporting base plate are numerous concentrically wound miniature coaxial cable assemblies. Coupled to the middle of each miniature coaxial cable assembly is a signal amplifying device having variable programmable gain which offsets signal attenuation caused by the length of miniature coaxial cable.

Abstract: A protection circuit for use with an electromagnetic interference filter used in conjunction with a three phase power circuit operating at a particular line frequency includes three capacitors which are coupled to the output terminals of the electromagnetic interference filter. The electromagnetic interference filter and the power circuit have a resonant frequency which is substantially equal to the line frequency. The capacitors of the protection circuit have values which are selected to change the resonant frequency of the electromagnetic interference filter and power circuit such that the resonant frequency is not substantially equal to the line frequency. A protection circuit assembly for use with an electromagnetic interference filter includes a base plate, three ceramic capacitors, three heat conducting substrates, and a protective cover which is mounted on the base plate. The capacitors are mounted on the heat conducting substrates, and the substrates are mounted on the base plate.

Abstract: Method and apparatus for processing on-line operands A, B and C to produce the arithmetic expression S=(A.times.B)+C. In general, the apparatus includes an input processing unit, an on-line multiplication unit, and an on-line serial addition unit. The input processing unit is sequentially introducing the digits of operands, A, B and C into the apparatus, where each digit is represented in a redundant binary number format. The multiplication unit multiplies the sequence of digits of the operands A and B to produce the n-th product digit p.sub.n of the product P=A.times.B, with the most significant digit p.sub.o being computed first. The on-line addition unit adds the n-th product digit to the n-th digit of on-line operand C, so as to produce the n-th digit s.sub.n of the arithmetic expression S=(A.times.B)+C, with the most significant digit s.sub.o being produced first.

Abstract: An oscillator operational in the millimeter wave and microwave range, including frequencies greater than 60 GHz, is provided with reduced phase noise by enhancing Q of the resonant circuitry by reactively terminating fundamental frequency oscillation and increasing stored fundamental frequency energy in the resonant circuitry. A two frequency system is provided with constructive reflection of energy at fundamental frequency back to the resonant circuitry, and with isolation of fundamental frequency energy from the output load. Energy to the output load is obtained from the in-situ generated second harmonic of the active element. Phase noise is reduced by enhancing Q by more than an order of magnitude.

Abstract: A frequency divider includes a power divider which receives an input signal and divides the input signal into first and second signals. A frequency doubler receives the first signal and provides a third signal having a frequency which is twice the frequency of the first signal. A hybrid junction sums the second and third signals and provides a fourth signal which corresponds to the sum of the second and third signals and which has a low frequency modulation component which is substantially equal to one-half the frequency of the input signal, as well as a high frequency carrier component. An envelope detector and a band-pass filter, connected in series, receive the fourth signal and provide an output signal corresponding to the low frequency component of the fourth signal, which low frequency component is substantially equal to one-half the frequency of the input signal.

Abstract: A circuit for determining which of a plurality of binary numbers has the greatest decimal equivalent includes a binary-to-decimal converter which converts each of the binary numbers to a decimal equivalent code, a series of logic OR gates which OR together corresponding bits of like decimal value of each of the decimal equivalent codes, a priority encoder which compares the outputs of the OR gates, determines which output of the OR gates is active and has the greatest decimal value of the decimal codes, and converts the decimal code having the greatest value to a binary number, and a comparator which compares the binary number from the priority encoder with each of the binary numbers provided to the binary-to-decimal converter.

Abstract: A circular array includes a plurality of antenna elements which are spaced apart from each other and situated in a conical arrangement and in parallel rows circumferentially about the longitudinal axis of the conical arrangement. The circumferential spacing between the phase centers of adjacent antenna elements of any one row situated closer to the base of the conical arrangement is greater than that of adjacent antenna elements situated relatively closer to the apex of the conical arrangement. The respective operating frequencies of the antenna elements of any one row situated closer to the base of the conical arrangment is lower than the operating frequencies of the antenna elements of any other row situated relatively closer to the apex. The circuit array antenna further includes a plurality of feed lines, where each feed line is coupled to an antenna element of each row in progression.

Abstract: A passive doppler differential ranging method for use with respect to an aircraft radar for determining the range, R, of a threat passively, includes the steps of mounting a first receiving antenna and a second receiving antenna on an aircraft and positioning the first and second antennas a known distance, d, apart from each other, and determining the azimuth angle .alpha. of the threat with respect to the aircraft at a first time t.sub.o. A first differential doppler phase shift, .DELTA..phi., between the first and second antennas of a received signal transmitted by the threat at time t.sub.o is then determined. The velocity of the aircraft is measured, and a second differential phase shift, .DELTA..phi..sub.1, between the first and second antennas of a received signal transmitted by the threat at time t.sub.1 is then determined. The differential differential doppler phase shift, .DELTA..DELTA..phi.

Abstract: A high resolution event occurrence time counter includes a free running counter which is responsive to a clock signal and which provides count data that varies in response to the clock signal. A first register stores the count data of the free running counter. The first register provides first register data representative of the count data stored in the register. A second register stores the first register data and provides first time of arrival data representative of the first register data stored in the second register. A third register stores the count data of the free running counter. The third register provides second time of arrival data representative of the count data which is stored in the third register. A clock edge encoder determines whether an event occurred during the first half cycle of the clock signal or during the second half cycle.