Abstract: A charge pump of a phase-locked loop (PLL) circuit includes a current source circuit, a current sink circuit, and a biasing circuit. The biasing circuit includes a current digital-to-analog converter (IDAC) and a low-pass filter (LPF). The IDAC provides a reference current in response to a current value setting, wherein a first voltage is established due to the reference current. The LPF applies low-pass filtering to the first voltage to generate a filter output as a second voltage, wherein bias voltages of the current source circuit and the current sink circuit are controlled by the second voltage.

Abstract: An Ethernet physical-layer transceiver includes a control circuit and a processing circuit. The control circuit sequentially employs a plurality of different phase combinations of a transmitter clock and a receiver clock for transmission and reception of data over a cable, and obtains a plurality of sets of samples from the cable under the plurality of different phase combinations of the transmitter clock and the receiver clock, respectively. The processing circuit performs channel characteristic analysis according to the plurality of sets of samples provided by the control circuit.

Abstract: The invention relates to methods, non-transitory computer-readable storage medium, and apparatus for transmitting and receiving a wireless multi-source packet. A processing unit of a first audio-data transmitter device obtains data-slot assignments indicating that a first data slot is assigned to a second audio-data transmitter device and a second data slot is assigned to first audio-data transmitter device for data transmission from a audio-data receiver device; tunes in a first physical channel in the first data slot to obtain a first frame from the second audio-data transmitter device; obtains a second frame including a chunk of second audio data originated by the first audio-data transmitter device; encapsulates the first frame and the second frame into a payload of a media packet; and transmits the media packet at a second physical channel to the audio-data receiver device in the second data slot.

Abstract: The invention relates to methods, non-transitory computer-readable storage medium, and apparatus for retransmitting wireless peer packets. A method for retransmitting wireless peer packets, which is performed by a processing unit of a first wireless slave device, includes: receiving a media packet that is originally sent by a wireless master device to a second wireless slave device in a peer-side time period; and transmitting the media packet in a medium in the peer-side time period when a retransmission mechanism is activated between the wireless master device and the second wireless slave device for retransmitting the media packet. The first wireless slave device and the second wireless slave device are mutually peer devices. The peer-side time period indicates a time period that is originally used by the second wireless slave device communicating with the wireless master device.

Abstract: There is provided a wireless device including an earphone set and a charging cradle. The charging cradle is used as means for charging the earphone set. The charging cradle further records connection information of multiple external devices that have been BT connected to the charging cradle. The earphone set receives a connection command from the charging cradle to accordingly form an audio connection to one of the multiple external devices. The charging cradle is further used as a communication medium between the multiple external devices.

Abstract: A Bluetooth transmitter, a Bluetooth device, and a transmitter are provided. After being received by the transmitter, a transmission bitstream is modulated to generate a first-path modulated signal and a second-path modulated signal, which are up-converted to a first first-path up-converted signal, a second first-path up-converted signal, a first second-path up-converted signal, and a second second-path up-converted signal. The first first-path and the second first-path up-converted signals are corresponding to a first broadcast channel, and the first second-path and the second second-path up-converted signals correspond to a second broadcast channel. A first-path baseband signal is generated based on the first first-path and the second first-path up-converted signals, and a second-path baseband signal is generated based on the first second-path and the second second-path up-converted signals. A broadcast signal is generated based on the first-path and the second-path baseband signals.

Abstract: A noise reduction (NR) system includes a finite impulse response (FIR) filter and a filter manager circuit. The FIR filter is used to perform NR upon a filter input derived from an input signal. The filter manager circuit is used to determine a configuration of a minimum phase filter according to the input signal, and update the FIR filter by the configuration of the minimum phase filter.

Abstract: An active noise control (ANC) circuit is used for generating an anti-noise signal, and has a plurality of filters including at least one first filter and at least one second filter. The at least one first filter generates at least one first filter output, wherein each of the at least one first filter has a first filter type. The at least one second filter generates at least one second filter output, wherein each of the at least one second filter has a second filter type different from the first filter type. The anti-noise signal is jointly controlled by the at least one first filter output and the at least one second filter output. The at least one first filter and the at least one second filter are connected in a parallel fashion.

Abstract: A wireless communication method includes: deriving a first received signal at a target channel from a first radio-frequency (RF) signal received through a first antenna; deriving a plurality of different parameters from signal strength of the first received signal; and performing a first packet detection operation for detecting if a packet is included in the first received signal by jointly considering the plurality of different parameters of the first received signal.

Abstract: The invention relates to methods, non-transitory computer-readable storage medium, and apparatus for transmitting wireless multi-channel data. A method for transmitting wireless multi-channel data, which is performed by a processing unit of a wireless master device, includes: determining a first physical channel to be jumped into for a first wireless slave device, and a second physical channel to be jumped into for a second wireless slave device; and when the first physical channel is different from the second physical channel, transmitting a first media packet to the first wireless slave device in the first physical channel and a second media packet to the second wireless slave device in the second physical channel in a transmission slot of a subevent. The first wireless slave device and the second wireless slave device are peer devices with each other.

Abstract: A frequency offset (FO) estimation method includes: sampling a frequency-modulated repetition-coded segment of a packet to generate a plurality of samples; obtaining a frequency deviation (FD) value for each of a plurality of target samples selected from the plurality of samples; and estimating an FO value through accumulating complete FD values of the plurality of target samples.

Abstract: An electronic device includes a first circuit block and a second circuit block. The first circuit block is allocated in a first power domain, and includes a first clock counter and an updating circuit. The first clock counter is arranged to generate a first counter value according to a first reference clock. The updating circuit is arranged to receive a second counter value, and update the first counter value according to the second counter value. The second circuit block is allocated in a second power domain, and includes a second clock counter arranged to generate the second counter value according to a second reference clock. The first power domain and the second power domain are controlled independently.

Abstract: A 100BASE-TX transceiver includes a receive (RX) circuit, a transmit (TX) circuit, a clock generator circuit, a clock and data recovery (CDR) circuit, and a clock multiplexer circuit. The RX circuit receives an input data to generate an RX data. The TX circuit transmits a TX data according to a TX clock, to generate an output data. The clock generator circuit generates an output clock. The CDR circuit generates an RX recovered clock according to the RX data. The clock multiplexer circuit receives the output clock and the RX recovered clock, and outputs the TX clock that is selected from the output clock and the RX recovered clock.

Abstract: An output driver includes a first pre-driver circuit, a first driver circuit, a second pre-driver circuit, a second driver circuit, and a feedback network. The first pre-driver circuit pre-drives a first data input signal to generate a first pre-driving output signal. The first driver circuit drives the first pre-driving output signal to generate a first data output signal. The second pre-driver circuit pre-drives a second data input signal to generate a second pre-driving output signal, wherein the first data input signal and the second data input signal are a differential input of the output driver. The second driver circuit drives the second pre-driving output signal to generate a second data output signal. The feedback network performs a latching operation upon the first pre-driving output signal and the second pre-driving output signal according to the first data output signal and the second data output signal.

Abstract: A feedback control circuit of a pulse-frequency modulation (PFM) converter includes an on-time timer circuit and a detection circuit. The on-time timer circuit generates an on-time control signal for controlling an on-time duration of a switch circuit included in a power stage circuit of the PFM converter. The detection circuit controls the on-time timer circuit to adaptively adjust the on-time control signal according to a pulse interval between two successive inductor current pulses of the PEM converter.

Abstract: The invention relates to a method, a non-transitory computer-readable storage medium, and an apparatus for receiving Bluetooth packets and correcting error bits therein. The method, which is performed by a processing unit, includes: receiving Bluetooth packets from radio frequency (RF) signal; verifying a unique synthesized packet with a checksum thereof when the unique synthesized packet can be generated from the Bluetooth packets; and transmitting a synthesized packet that has passed a verification to a program module for an application when the unique synthesized packet passes the verification.

Abstract: An embodiment of the present application discloses a global navigation satellite system (GNSS) integrated circuit (IC). The GNSS IC includes a GNSS module, a memory and a processor. The GNSS module is arranged operably to receive a to-be-identified broadcast GNSS signal. The memory is arranged operably to store a plurality of ephemeris aiding data candidates, wherein the ephemeris aiding data candidates are not provided by the GNSS module. The processor is arranged operably to determine whether the to-be-identified broadcast GNSS signal is a spoofing signal based on an ephemeris aiding data reference in the ephemeris aiding data candidates.

Abstract: A semiconductor package includes a first die, a second die, and a hybrid-type adhesive. The second die is stacked on the first die through the hybrid-type adhesive. The hybrid-type adhesive includes a conductive adhesive and a non-conductive adhesive. The conductive adhesive is disposed between the non-conductive adhesive and the first die. The non-conductive adhesive is disposed between the conductive adhesive and the second die.

Abstract: An electronic device includes a receiver circuit, a clock generator circuit, and a clock control circuit. The receiver circuit receives first clock information associated with a first clock of another electronic device. The clock generator circuit generates a second clock for the electronic device. The clock control circuit obtains second clock information associated with the second clock, generates a clock control signal according to the first clock information and the second clock information, and outputs the clock control signal to the clock generator circuit, where the clock generator circuit adjusts the second clock in response to the clock control signal.

Abstract: A wireless communication device includes a receiver circuit, a phase shift control circuit, and a digital phase-locked loop (DPLL) circuit. The receiver circuit includes a down-converter circuit that is used to apply down-conversion to an input signal according to a local oscillator (LO) signal. The phase shift control circuit is used to generate a phase shift signal. The DPLL circuit is used to generate the LO signal locked to an initial frequency under a frequency-lock state. In response to the phase shift signal, the DPLL circuit is further used to make the LO signal have a different frequency without leaving the frequency-lock state.