Patents Assigned to Akros Silicon Inc.
  • Patent number: 9197423
    Abstract: A network device comprises an interface coupling an electronic device to a differential pair of signal lines, and an integrated active common mode suppression and electrostatic discharge protection circuit coupled to the interface in parallel to differential signal lines of the electronic device. First and second resistors are respectively coupled to the differential lines between the integrated active common mode suppression and electrostatic discharge protection circuit and the electronic device.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: November 24, 2015
    Assignee: AKROS SILICON, INC.
    Inventors: Philip John Crawley, Amit Gattani, John R. Camagna, Jun Cai
  • Patent number: 9191216
    Abstract: Embodiments of the present invention provide a power source equipment (PSE) network device operable to provide a network signal that may include both power and data. This PSE network device includes a network connector and an integrated circuit. The network connector physically couples the PSE network device to the network. The integrated circuit further includes a power feed circuit. This power feed circuit is operable to combine and pass the received data signals and power signal as a single network signal. A PSE controller electrically couples to the integrated circuit but is not necessarily part of the integrated circuit. The PSE controller is operable to govern the production and distribution of the power portion of the network signal.
    Type: Grant
    Filed: October 13, 2005
    Date of Patent: November 17, 2015
    Assignee: AKROS SILICON, INC
    Inventors: John R. Camagna, Sajol Ghoshal, J. Francois Crepin
  • Patent number: 9189036
    Abstract: In a network device, a connector module comprises a network connector coupled to the connector module in a configuration that transfers power and communication signals and an application connector that comprises serial media independent interface (SMII) pins and power pins. A Power-over-Ethernet (PoE) circuit is coupled between the network connector and the application connector.
    Type: Grant
    Filed: April 24, 2007
    Date of Patent: November 17, 2015
    Assignee: AKROS SILICON, INC.
    Inventors: Sajol Ghoshal, John R. Camagna, Philip John Crawley
  • Patent number: 9185834
    Abstract: A network device comprises an Ethernet physical layer (PHY) comprising an isolation, protection, and electromagnetic interference suppression barrier operative for isolated power and data transfer.
    Type: Grant
    Filed: April 24, 2007
    Date of Patent: November 10, 2015
    Assignee: AKROS SILICON, INC.
    Inventors: Philip John Crawley, Sajol Ghoshal, John R. Camagna
  • Patent number: 8400230
    Abstract: In an electronic system, a frequency modulator manages clock signals for electromagnetic interference (EMI) reduction. The illustrative frequency modulator comprises a core oscillator, and a clock divider coupled to the core oscillator that modulates frequency of the core oscillator and deterministically spreads clock spectral components of a digital clock signal whereby electromagnetic interference (EMI) is reduced. The frequency modulator further comprises a circuit coupled to the clock divider that receives the digital clock signal, combines the digital clock signal with a data bitstream for transmission across an isolation barrier, and resynchronizes to the digital clock signal.
    Type: Grant
    Filed: July 31, 2009
    Date of Patent: March 19, 2013
    Assignee: Akros Silicon Inc.
    Inventors: Philip John Crawley, Kenneth William Taylor
  • Patent number: 8050315
    Abstract: An open collector/open drain interface, such as I2C interface between two or more integrated circuit devices, employs isolation techniques to provide electrical isolation of a digital signal for transmission of the signal between the devices. Uni-directional isolator channels are utilized to transmit bidirectional digital signals, and a selection of an isolator channel operating in an intended transmission direction is performed by direction control logic. Edge detection logic is utilized to determine changes in edges of a digital signal, thus determining a transmitting device and a transmission direction. The direction state is held in a direction state register. This state is held until the appropriate edge is detected on the transmit side, returning the isolator to the idle state. In the idle state neither side of the isolator is in a driven state. During transmission, the digital signal is transmitted through an isolator channel and sent to a receiving device.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: November 1, 2011
    Assignee: Akros Silicon Inc.
    Inventors: David Bliss, Sajol Ghoshal
  • Patent number: 7965480
    Abstract: A network device comprises an interface coupling an electronic device to a differential pair of signal lines, and an integrated active common mode suppression and electrostatic discharge protection circuit coupled to the interface in parallel to differential signal lines of the electronic device.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: June 21, 2011
    Assignee: Akros Silicon Inc.
    Inventors: Philip John Crawley, Amit Gattani, Jun Cai
  • Patent number: 7964993
    Abstract: Embodiments disclosed herein describe a network device including a class AB common mode suppression (CMS) circuit coupled in parallel between a line voltage source and a physical layer (PHY) device that provides active EMI suppression and Phy device termination. A network connector is coupled to provide the line voltage source to the class AB CMS circuit. The class AB CMS circuit provides current to the PHY device, terminates open-drain transmit drivers of the PHY device and suppresses common mode noise thereby minimizing electromagnetic interference. In other embodiments, the class AB CMS circuit is coupled in parallel between the network connector and a physical layer (PHY) device. The class AB CMS circuit suppresses common mode noise, and terminates open-drain transmit drivers of the PHY device, thereby minimizing electromagnetic interference.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: June 21, 2011
    Assignee: Akros Silicon Inc.
    Inventors: Jun Cai, Amit Gattani
  • Patent number: 7923710
    Abstract: A signal isolator comprises an isolation barrier, a transmitter, a differentiator, and a recovery circuit. The transmitter is coupled to a first side of the isolation barrier and is configured to receive and convert an information signal to a differential signal that encodes information in the information signal in a single transition edge. The differentiator is coupled to a second side that is isolated from the first side of the isolation harrier and differentiates the differential signal. The recovery circuit is coupled to the differentiator and operates to recover an output information signal based on the information in the single transition edge.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: April 12, 2011
    Assignee: Akros Silicon Inc.
    Inventors: Philip John Crawley, Sajol Ghoshal, John R. Camagna
  • Patent number: 7921308
    Abstract: Embodiments disclosed herein describe a network interface device including a first powered device controller coupled to first and second power supply lines. A second powered device controller coupled to third and fourth input power supply lines. A dc-dc converter coupled to receive a single signal representing a sum of power signals output by the first and second powered device controllers.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: April 5, 2011
    Assignee: Akros Silicon, Inc.
    Inventors: Timothy A. Dhuyvetter, Sajol Ghoshal
  • Patent number: 7921252
    Abstract: An interface between USB devices employs isolation techniques to provide electrical isolation of a USB signal for transmission of the USB signal between the devices. Unidirectional isolator channels are utilized to transmit the USB signals, and a selection of an isolator channel operating in an intended direction is performed by either direction control logic or a USB hub function. Logic may be employed to detect a device attempting to initiate a USB signal. The logic operates to enable a transmitter on a receiving side and isolate the USB signal through an isolator channel operating in a transmission direction.
    Type: Grant
    Filed: January 18, 2011
    Date of Patent: April 5, 2011
    Assignee: Akros Silicon Inc.
    Inventors: David Bliss, Sajol Ghoshal
  • Patent number: 7898825
    Abstract: A current-mode controller comprises an inductance element, at least one semiconductor switch coupled to the inductance element, and a ramp compensator coupled to sense an indication of current through the inductance element and coupled to control the at least one semiconductor switch that senses current during on-time of the DC-DC converter, infers current during off-time of the DC-DC converter, and determines a slope compensation signal based on the sensed and inferred currents.
    Type: Grant
    Filed: March 24, 2008
    Date of Patent: March 1, 2011
    Assignee: Akros Silicon, Inc.
    Inventors: Michael D Mulligan, Philip John Crawley, John Camagna
  • Patent number: 7899968
    Abstract: An interface between USB devices employs isolation techniques to provide electrical isolation of a USB signal for transmission of the USB signal between the devices. Unidirectional isolator channels are utilized to transmit the USB signals, and a selection of an isolator channel operating in an intended direction is performed by either direction control logic or a USB hub function. Logic may be employed to detect a device attempting to initiate a USB signal. The logic operates to enable a transmitter on a receiving side and isolate the USB signal through an isolator channel operating in a transmission direction.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: March 1, 2011
    Assignee: Akros Silicon Inc.
    Inventors: David Bliss, Sajol Ghoshal
  • Patent number: 7864546
    Abstract: A power converter comprises a direct current (DC)-DC converter configured to receive an input voltage in a primary domain, a transformer coupled to and driven by the DC-DC converter and supplying an output voltage in a secondary domain, and a transmission path configured to pass a digital feedback signal through an isolation barrier from the secondary domain to the primary domain.
    Type: Grant
    Filed: February 13, 2007
    Date of Patent: January 4, 2011
    Assignee: Akros Silicon Inc.
    Inventors: Timothy A. Dhuyvetter, Sajol Ghoshal
  • Patent number: 7855866
    Abstract: A network interface apparatus is disclosed that includes a connector coupled to a plurality of communication lines. A Physical Layer (PHY) device coupled to the communication lines and to a first ground level. A transient event suppression module coupled between the communication lines and a low impedance path to earth ground. During a transient event the transient event suppression module provides a low impedance path to the earth ground to protect the PHY device from the transient event. A power circuit that delivers power from a second ground level to the PHY device is coupled to the first ground level. The first ground level and the second ground level are coupled to provide a low impedance path during normal operation and high impedance during transient events.
    Type: Grant
    Filed: February 23, 2007
    Date of Patent: December 21, 2010
    Assignee: Akros Silicon, Inc.
    Inventors: Philip J. Crawley, John Camagna, Charles Cai
  • Patent number: 7761719
    Abstract: In a network device, a connector module comprises a network connector coupled to the connector module in a configuration that transfers power and communication signals and an application connector that comprises serial media independent interface (SMII) pins and power pins. A Power-over-Ethernet (PoE) circuit is coupled between the network connector and the application connector.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: July 20, 2010
    Assignee: Akros Silicon Inc.
    Inventors: Sajol Ghoshal, John R. Camagna
  • Patent number: 7732889
    Abstract: A semiconductor device comprises an integrated circuit formed on a substrate with a signal interface and at least one isolator capacitor. The integrated circuit comprises a plurality of interleaved inter-metal dielectric layers and interlayer dielectrics formed on the substrate, a thick passivation layer formed on the plurality of the interleaved inter-metal dielectric layers and interlayer dielectrics, and a thick metal layer formed on the thick passivation layer. The thick passivation layer has a thickness selected to be greater than the isolation thickness whereby testing for defects is eliminated. The one or more isolator capacitors comprise the thick metal layer and a metal layer in the plurality of interleaved inter-metal dielectric layers and interlayer dielectrics separated by the thick passivation layer as an insulator.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: June 8, 2010
    Assignee: Akros Silicon Inc.
    Inventors: Philip John Crawley, Sajol Ghoshal
  • Patent number: 7706112
    Abstract: An active clamp device electrically couples first and second nodes in respective first and second supply domains referenced to ground potentials that can be different. The active clamp device comprises first and second active devices controlled by signals respectively referenced to the first and second supply domains that create a short-circuit or low impedance connection between the first and second nodes in normal operation and drive impedance between the first and second nodes high in response to a transient event.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: April 27, 2010
    Assignee: Akros Silicon Inc.
    Inventors: Philip John Crawley, Sajol Ghoshal
  • Patent number: 7701731
    Abstract: A method for transmitting an information signal across an isolation barrier comprises receiving an input signal, preconditioning the input signal according to a modulation function, passing the preconditioned signal through the isolation barrier, and recovering the passed signal according to a demodulation function corresponding to the modulation function, the recovered signal being operative as a feedback signal.
    Type: Grant
    Filed: February 13, 2007
    Date of Patent: April 20, 2010
    Assignee: Akros Silicon Inc.
    Inventors: Timothy A. Dhuyvetter, Sajol Ghoshal
  • Patent number: 7685452
    Abstract: Embodiments of the present invention provide a power feed circuit operable to supply an Ethernet power signal to a coupled Ethernet network. This power feed circuit includes a number of input nodes, differential transistor pairs, active control circuits and output nodes. The input nodes receive a first power signal such as that provided by an isolated 48 volt power supply. Each transistor of the differential transistor pairs couples to one input node. These differential transistor pairs produce a second power signal which may be supplied to the Ethernet network. The active control circuits sense the second power signal passed by each transistor and are operable to apply a feedback signal to the differential transistor pairs based on the sensed power signal. At least one twisted pair couples to each differential transistor pair's output node and is operable to pass the Ethernet power signal.
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: March 23, 2010
    Assignee: Akros Silicon Inc.
    Inventors: John R. Camagna, Philip Crawley, Sajol Ghoshal