Abstract: An apparatus to manage a set of switches in a computer network is described. In particular, a computer-readable medium to direct a computer network to function in a specified manner is provided. The computer-readable medium comprises instructions to configure a first switch of a set of switches as a first master switch and instructions to identify a first plurality of switches of the set of switches that are connected to the first master switch. The first plurality of switches includes a second switch and a third switch, and the second switch can be configured as a second master switch. The computer-readable medium also comprises instructions to modify an operational parameter associated with the third switch using the first master switch.

Abstract: A method of generating a lookup table includes receiving an input address; generating a compressed address from the input address, the compressed address having fewer bits than the input address; selecting a first set of bits from the compressed address; determining whether a memory location pointed to by the first set of bits in an address lookup table includes an unoccupied memory slot; determining whether the input address matches any address stored in the memory location pointed to by the first set of bits in the address lookup table; and selecting a second set of bits from the compressed address in response to there not being an unoccupied memory slot in the memory location pointed to by the first set of bits and the input address not matching any address stored in the memory location pointed to by the first set of bits. A lookup table generator includes an address compressor, a barrel shifter, and an address lookup table that includes a memory location that is pointed to by the first set of bits.

Abstract: Check bits for a cyclic code are generated for a binary integer by first obtaining a remainder value for each bit of the integer resulting from dividing the bits of the integer by a cyclic generator polynomial to obtain a quotient and said remainder. All remainders are then summed modulo 2 to obtain an integer remainder which functions as the cyclic code for the binary integer. An error in a received integer can be identified and corrected by generating new cyclic code check bits for the received integer, and then comparing the new cyclic code check bits to the received cyclic code check bits. Any difference between the two check bits will correspond to the unique remainder for an erroneous bit, which can then be corrected by complementing the bit. If two or more errors are present, an error will be recognized but the specific errors cannot be identified. The integer must then be discarded.