Abstract: A plurality of gate trenches is formed into a semiconductor substrate in an active cell region. One or more other trenches are formed in a different region. Each gate trench has a first conductive material in lower portions and a second conductive material in upper portions. In the gate trenches, a first insulating layer separates the first conductive material from the substrate, a second insulating layer separates the second conductive material from the substrate and a third insulating material separates the first and second conductive materials. The other trenches contain part of the first conductive material in a half-U shape in lower portions and part of the second conductive material in upper portions. In the other trenches, the third insulating layer separates the first and second conductive materials. The first insulating layer is thicker than the third insulating layer, and the third insulating layer is thicker than the second.
Type:
Grant
Filed:
March 4, 2016
Date of Patent:
August 22, 2017
Assignee:
Alpha and Omage Semiconductor Inc.
Inventors:
Yeeheng Lee, Lingpeng Guan, Hongyong Xue, Yiming Gu, Yang Xiang, Terence Huang, Sekar Ramamoorthy, Wenjun Li, Hong Chang, Madhur Bobde, Paul Thorup, Hamza Yilmaz