Abstract: An image sensor comprises an arrangement of pixels, the pixels including an acquisition circuit each, the acquisition circuit including: a sensor circuit configured to generate a sensor signal (VLOG) depending on a light signal illuminating a photosensor of the pixel; a storage circuit configured to store during a storage interval a stored signal (VSTORE) proportional to the sensor signal (VLOG); and a comparator circuit configured to generate after the refresh interval a comparator signal (VCOMP) depending on the sensor signal (VLOG) and the stored signal (VSTORE). A method of operating an image sensor comprises steps of generating a sensor signal (VLOG) depending on a light signal illuminating a photosensor of the pixel, storing during a storage interval a stored signal (VSTORE) proportional to the sensor signal (VLOG) and generating after the refresh interval a comparator signal (VCOMP) depending on the sensor signal (VLOG) and the stored signal (VSTORE).

Abstract: A delta image sensor comprising a plurality of acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes at least one sensor circuit comprising a photosensor to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor; at least one single slope analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal, wherein the A/D circuit (12) is configured to use one of a plurality of ramps for the conversion; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output, in response to the changed level.

Abstract: The present disclosure relates to an image sensor comprising a plurality of pixel circuits each comprising a photodiode connected between ground and a floating diffusion (FD) node, a reset transistor (MRST) connected between a first voltage supply and the floating diffusion (FD) node, and a source follower transistor (MSF), wherein its drain is connected to a second voltage supply, the gate is connected to a floating diffusion (FD) node and the source is connected to a row select transistor (MSEL). The row select transistor (MSEL) is connected between the source of the source follower transistor (MSF) and a common column output. Each pixel circuit is configured to output an output signal corresponding to a light incident on the photodiode. Each pixel circuit includes at least one additional transistor for configuring each pixel circuit to selectively output a linear integration signal or a logarithmic signal.