Abstract: A discrete multitone modulation transmission system is described in which frame synchronization is monitored using a transmitted synchronizing frame. The existence or loss of frame synchronization is determined by comparing the values of the synchronizing frame with corresponding stored values.

Abstract: An apparatus or system for data communications that provides crosstalk cancellation is disclosed. The apparatus or system removes crosstalk interference (e.g., NEXT interference) from received signals on a given line by adaptively estimating the crosstalk interference induced by certain other of the lines having interfering transmissions and by canceling the crosstalk interference using the estimated crosstalk interference from the certain other of the lines. The invention is useful for high speed data transmissions where crosstalk interference can be a substantial impediment to proper reception of data. In particular, the invention is useful for VDSL and ADSL data transmissions using multicarrier modulation (e.g., DMT), wherein transmission frames for all lines are synchronized but the duration of the direction of transmission can vary due to differing frames.

Abstract: A high speed, low power parallel multiplier is described. The parallel multiplier includes specialized hardware circuitry designed to perform complex multiplication operations at high speeds. The parallel multiplier requires significantly less die area than conventionally required, which results in reduced manufacturing costs and reduced power consumption.

Abstract: Allocations of bits per transmission symbol to subchannels in a transmission system using multicarrier modulation are updated in response to requests from a receiver to a transmitter of the system, each request identifying a carrier whose bit allocation can be increased and a carrier whose bit allocation can be decreased, so that the total number of bits per symbol can be increased, decreased, or be unchanged. In order to synchronize bit allocation changes, a transmitted symbol counter at the transmitter and a received symbol counter at the receiver maintain synchronized symbol counts. In response to a request for a change in bit allocations, the transmitter sends a future symbol count value to the receiver, and the transmitter and the receiver implement the change when their respective counters match this count value.