Abstract: A clock overdrive function is provided which advantageously facilitates testing of circuits incorporating timing circuits. The clock overdrive function allows a tester to furnish a clock pulse timing reference to drive a circuit containing a system clock, thereby overdriving the system clock signal. Overdriving of the system clock signal allows precise control of circuit timing. A method of overdriving a system clock signal includes the steps of forming a low reference voltage and a high reference voltage, applying a timing signal having a timing signal voltage at an external pin, comparing the timing signal voltage at the external pin to the low reference voltage and the high reference voltage, driving the circuit with the system clock timing signal when the timing signal voltage at the external pin is less than the low reference voltage and driving the circuit with the timing signal at the external pin, otherwise.

Abstract: A semiconductor electrically programmable read only memory device (EPROM) utilizes an array of memory cells each in the form of a single V-type MOSFET which achieves the normal AND function (Data-Word Address) using a capacitance coupled version of threshold logic. Each MOSFET is formed by a V-shaped recess at the intersection of each bit line and word line that extends across the diffused bit line, (which serves as the transistor drain) and into the substrate (which serves as the source and ground plane of the device). A similarly V-shaped floating gate is isolated below and above the crossing bit and word lines by thin oxide layers. A ring of P-type conductive material around the upper end of each V-shaped recess and adjacent its surrounding N-type drain region serves to lower the required programming voltage without increasing the device threshold voltage.