Abstract: A method of making an orientation-insensitive ultra-wideband coupling capacitor, including the steps of securing an unterminated multi-layer capacitor of a low frequency portion of the orientation-insensitive ultra-wideband coupling capacitor, coating completely the unterminated multi-layer capacitor of the low frequency portion with an adhesion layer having opposing ends, creating a circumferential slot around the adhesion layer and thereby electrically separating the opposing ends of the adhesion layer from each other thereby restoring capacitance and forming a slotted body, applying a solder dam coating to all surfaces defining the circumferential slot to protect the circumferential slot, and plating the opposing ends of the adhesion layer so as to form solderable connections and thereby form the orientation-insensitive ultra-wideband coupling capacitor.

Abstract: A method of making an orientation-insensitive ultra-wideband coupling capacitor, including the steps of securing an unterminated multi-layer capacitor of a low frequency portion of the orientation-insensitive ultra-wideband coupling capacitor, coating completely the unterminated multi-layer capacitor of the low frequency portion with an adhesion layer having opposing ends, creating a circumferential slot around the adhesion layer and thereby electrically separating the opposing ends of the adhesion layer from each other thereby restoring capacitance and forming a slotted body, applying a solder dam coating to all surfaces defining the circumferential slot to protect the circumferential slot, and plating the opposing ends of the adhesion layer so as to form solderable connections and thereby form the orientation-insensitive ultra-wideband coupling capacitor.

Abstract: An orientation-insensitive ultra-wideband coupling capacitor. The orientation-insensitive ultra-wideband coupling capacitor includes a plurality of external surfaces, a low frequency portion, and a high frequency portion. The high frequency portion is so disposed on, and electrically connected to, the low frequency portion so as to allow the orientation-insensitive ultra-wideband coupling capacitor to work identically when mounted on any external longitudinal surface of the plurality of external surfaces thereof and thereby be readily SMT compatible without regard to special orienting procedures.

Abstract: A bypass circuit includes a planar electrode layer which is mounted between a pair of dielectric layers. The electrode layer generally is centered inwardly with respect to the dielectric layers leaving an outward margin of dielectric material. One of the dielectric layers has two spaced apart contact members, each having a different polarity from the other. A resistive layer is centered on the other dielectric layer. The contact members extend onto end portions of the dielectric layers and electrically connect to opposite ends of the resistive layer. The electrode layer is isolated from electrical contact with any conductor and is buried within the dielectric layers. The electrode layer, in combination with the dielectric layer on which the contact members are mounted and the contact members, allow development of a selected value of capacitance between the contact members.

Abstract: A monolithic capacitor chip includes a first electrode layer enclosed in a ceramic which comprises a ceramic layer. The first electrode is on one side of the ceramic layer. A second electrode is formed as a pad for contact with the other side of the ceramic layer. In one embodiment of the present invention, the first electrode is accessed electrically by way of an end cap. In another embodiment the first electrode is accessed electrically by way of a conductive via through the ceramic layer.

Abstract: A capacitor includes a planar electrode layer which is mounted between a pair of dielectric layers. The electrode layer generally is centered inwardly with respect to the dielectric layers leaving an outward margin of dielectric material. One of the dielectric layers has two spaced apart contact members, each having a different polarity from the other. The electrode layer is isolated from electrical contact with any conductor and is buried within the dielectric layers. The electrode layer, in combination with the dielectric layer on which the contact members are mounted and the contact members, allow development of a selected value of capacitance between the contact members. Providing trimmed contact members as well as controlling their size and spacing allow for convenient preselection of desired operative characteristics of the capacitor. The contact members could be positioned on a substrate to which a buried electrode is mounted.

Abstract: An inductive coupling device for external circuitry to pass electric currents therethrough via inductively coupled electrodes, comprises a monolithic, dielectric, ceramic block made from a multiplicity of stacked dielectric ceramic plates or layers all bonded together. First and second flat rectangular Z-shaped electrodes are embedded in the block between the ceramic layers and bonded thereto. The electrodes are spaced apart by one dielectric layer and generally overlap at least in part for effectively coupling to each other. The block also carries electrically conductive grounding films or layers bonded to the underside of the top and bottom dielectric layers of the block. These films are coupled to adjacent ones of the Z-shaped electrodes. The block may be rectangular in configuration. Conductive stripes on lateral and end faces of the block contact ends of the Z-shaped electrodes and ends of the grounding films and serve as terminals for connecting external circuitry thereto.

Abstract: A monolithic multilayer capacitor of known capacitance has a body with six external walls and a plurality of spaced electrodes embedded in the body and spaced from a first one of the walls. Two spaced end walls have electrical terminations to which alternate electrodes are respectively connected. The electrode adjacent the first wall is spaced a first distance and the remaining electrodes are spaced apart a second distance. One or more slits in the first wall sever the first electrode adjacent to the wall leaving all the other electrodes intact and reducing the capacitor by predetermined amounts depending on the location of the slits.

Abstract: A multilayer capacitor has a dielectric block with a marked position where the adjustable capacitance is to be placed. The capacitor has two end walls on which are first and second terminal electrodes. The electrodes have first and second narrow bands extending over marginal end portions of first and second side walls of the block. Two narrow spaced conductive stripes on the first side wall extend from the first band along lateral edges of the first side wall and terminate short of the second band to define a first rectangular U-shaped extension of the first terminal electrode on the first side wall. In the block are embedded spaced electrodes to determined the capacitance of the capacitor. A first stripe of conductive ink of any desired width can be applied to an uncovered area of the first wall to contact the U-shaped extension of the first terminal electrode to adjust capacitance of the capacitor.

Abstract: In this process a conductive first layer composed of finely divided metal and finely divided ceramic material in an organic carrier is applied to a surface of an unsintered ceramic body. The conductive layer forms terminations when the body, and the conductive layer are cofired to sinter and form a unitary, integral, monolithic structure. A second conductive metal layer may be applied to the first layer prior to cofiring to improve attachment capabilities of the component. Leads may be attached to the conductive terminations if desired.

Abstract: This instrument for use in tuning and testing radio frequency circuits, comprises an elongated dielectric rod long enough to be grasped by hand, and having a miniature electronic component at one end secured by an adhesive layer and a length of shrink-wrapped plastic tubing. Two closely spaced stiff leads project from the component for application to closely spaced test points of a radio frequency circuit under test. The component can comprise a miniature test circuit, interconnected miniature electronic parts of any type, a miniature capacitor alone, or a capacitor in circuit with other electronic circuit parts.

Abstract: This capacitor has a monolithic dielectric block in which are laterally spaced electrode plates electrically connected to respective external terminal layers. On one or both sides of the block are conductive stripes of the same or different sizes which may be connected by jumper elements to the terminal layers. Electrodes in the block are closely spaced by thin dielectric spacers from the conductive stripes. Selective ones of the stripes may be connected to the terminal layers for adjusting the capacitance of the capacitor to different predetermined magnitudes.