Patents Assigned to Amkor Technology, Inc.
  • Patent number: 10763129
    Abstract: A system and method for laser assisted bonding of semiconductor die. As non-limiting examples, various aspects of this disclosure provide systems and methods that enhance or control laser irradiation of a semiconductor die, for example spatially and/or temporally, to improve bonding of the semiconductor die to a substrate.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: September 1, 2020
    Assignee: Amkor Technology, Inc.
    Inventors: Tae Ho Yoon, Yang Gyoo Jung, Min Ho Kim, Youn Seok Song, Dong Soo Ryu, Choong Hoe Kim
  • Patent number: 10748786
    Abstract: A semiconductor device having one or more tiered pillars and methods of manufacturing such a semiconductor device are disclosed. The semiconductor device may include redistribution layers, a semiconductor die, and a plurality of interconnection structures that operatively couple a bottom surface of the semiconductor die to the redistribution layers. The semiconductor device may further include one or more conductive pillars about a periphery of the semiconductor die. The one or more conductive pillars may be electrically connected to the redistribution layers and may each comprise a plurality of stacked tiers.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: August 18, 2020
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventors: Ronald Patrick Huemoeller, Michael G. Kelly, Curtis Zwenger
  • Patent number: 10734343
    Abstract: Provided is a disclosure for optimizing the number of semiconductor devices on a wafer/substrate. The optimization comprises laying out, cutting, and packaging the devices efficiently.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: August 4, 2020
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventors: Glenn Rinne, Daniel Richter
  • Patent number: 10714408
    Abstract: A package includes a substrate having an electronic component flip chip mounted thereto by flip chip bumps. The electronic component includes an active surface and an inactive surface. Electrically conductive columns (TSV) extend through the electronic component between the active surface and the inactive surface. A RDL structure is coupled to the inactive surface, the RDL structure redistributing the pattern of the electrically conductive columns at the inactive surface to a pattern of inactive surface RDL lands. The inactive surface RDL lands are exposed through via apertures of a package body. By using the inactive surface of the electronic component to distribute the inactive surface RDL lands, the allowable size of the electronic component is maximized.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: July 14, 2020
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventors: Louis W. Nicholls, Roger D. St. Amand, Jin Seong Kim, Woon Kab Jung, Sung Jin Yang, Robert F. Darveaux
  • Patent number: 10714378
    Abstract: Methods and systems for a semiconductor device package with a die to interposer wafer first bond are disclosed and may include bonding a plurality of semiconductor die comprising electronic devices to an interposer wafer, and applying an underfill material between the die and the interposer wafer. Methods and systems for a semiconductor device package with a die-to-packing substrate first bond are disclosed and may include bonding a first semiconductor die to a packaging substrate, applying an underfill material between the first semiconductor die and the packaging substrate, and bonding one or more additional die to the first semiconductor die. Methods and systems for a semiconductor device package with a die-to-die first bond are disclosed and may include bonding one or more semiconductor die comprising electronic devices to an interposer die.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: July 14, 2020
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventors: Michael G. Kelly, Ronald Patrick Huemoeller, Won Chul Do, David Jon Hiner
  • Patent number: 10707181
    Abstract: A semiconductor device with redistribution layers formed utilizing dummy substrates is disclosed and may include forming a first redistribution layer on a first dummy substrate, forming a second redistribution layer on a second dummy substrate, electrically connecting a semiconductor die to the first redistribution layer, electrically connecting the first redistribution layer to the second redistribution layer, and removing the dummy substrates. The first redistribution layer may be electrically connected to the second redistribution layer utilizing a conductive pillar. An encapsulant material may be formed between the first and second redistribution layers. Side portions of one of the first and second redistribution layers may be covered with encapsulant. A surface of the semiconductor die may be in contact with the second redistribution layer. The dummy substrates may be in panel form. One of the dummy substrates may be in panel form and the other in unit form.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: July 7, 2020
    Assignee: AMKOR TECHNOLOGY INC.
    Inventors: Jin Young Kim, Ji Young Chung, Doo Hyun Park, Choon Heung Lee
  • Patent number: 10692918
    Abstract: Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 ?m or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: June 23, 2020
    Assignee: Amkor Technology, Inc.
    Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Ju Hoon Yoon
  • Publication number: 20200194542
    Abstract: A method for forming a packaged electronic device includes providing a substrate having a first major surface and an opposing second major surface. The method includes attaching an electronic device to the first major surface of the substrate and providing a first conductive structure coupled to at least a first portion of the substrate. The method includes forming a dielectric layer overlying at least part of the first conductive structure. The method includes forming a conductive layer overlying the dielectric layer and connected to a second portion of the substrate. The first conductive structure, the dielectric layer, and conductive layer are configured as a capacitor structure and further configured as one or more of an enclosure structure or a stiffener structure for the packaged electronic device.
    Type: Application
    Filed: December 12, 2018
    Publication date: June 18, 2020
    Applicant: Amkor Technology, Inc.
    Inventor: Ramakanth Alapati
  • Patent number: 10679952
    Abstract: A semiconductor device including a relatively thin interposer excluding a through silicon hole and a manufacturing method thereof are provided. The method includes forming an interposer on a dummy substrate. The forming of the interposer includes, forming a dielectric layer on the dummy substrate, forming a pattern and a via on the dielectric layer, and forming a seed layer at the pattern and the via of the dielectric layer and forming a redistribution layer and a conductive via on the seed layer. A semiconductor die is connected with the conductive via facing an upper portion of the interposer, and the semiconductor die is encapsulated with an encapsulant. The dummy substrate is removed from the interposer. A bump is connected with the conductive via facing a lower portion of the interposer.
    Type: Grant
    Filed: February 10, 2017
    Date of Patent: June 9, 2020
    Assignee: Amkor Technology, Inc.
    Inventors: Jong Sik Paek, Won Chul Do, Doo Hyun Park, Eun Ho Park, Sung Jae Oh
  • Patent number: 10672715
    Abstract: A semiconductor package includes a cavity substrate, a semiconductor die, and an encapsulant. The cavity substrate includes a redistribution structure and a cavity layer on an upper surface of the redistribution structure. The redistribution structure includes pads on the upper surface, a lower surface, and sidewalls adjacent the upper surface and the lower surface. The cavity layer includes an upper surface, a lower surface, sidewalls adjacent the upper surface and the lower surface, and a cavity that exposes pads of the redistribution structure. The semiconductor die is positioned in the cavity. The semiconductor die includes a first surface, a second surface, sidewalls adjacent the first surface and the second surface, and attachment structures that are operatively coupled to the exposed pads. The encapsulant encapsulates the semiconductor die in the cavity and covers sidewalls of the redistribution structure.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: June 2, 2020
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventors: Young Do Kweon, JeongByung Chae, DongJoo Park, ByoungWoo Cho, SeHwan Hong
  • Patent number: 10672676
    Abstract: A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise an interconnection structure, for example a bond wire, at least a portion of which extends into a dielectric layer utilized to mount a plate, and/or that comprise an interconnection structure that extends upward from the semiconductor die at a location that is laterally offset from the plate.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: June 2, 2020
    Assignee: Amkor Technology, Inc.
    Inventors: Ji Young Chung, Dong Joo Park, Jin Seong Kim, Jae Sung Park, Se Hwan Hong
  • Patent number: 10672740
    Abstract: Methods and systems for a semiconductor package with high routing density routing patch are disclosed and may include a semiconductor die bonded to a substrate and a high routing density patch bonded to the substrate and to the semiconductor die, wherein the high routing density patch comprises a denser trace line density than the substrate. The high routing density patch can be a silicon-less-integrated module (SLIM) patch, comprising a BEOL portion, and can be TSV-less. Metal contacts may be formed on a second surface of the substrate. A second semiconductor die may be bonded to the substrate and to the high routing density patch. The high routing density patch may provide electrical interconnection between the semiconductor die. The substrate may be bonded to a silicon interposer. The high routing density patch may have a thickness of 10 microns or less. The substrate may have a thickness of 10 microns or less.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: June 2, 2020
    Assignee: Amkor Technology, Inc.
    Inventors: Michael Kelly, Ronald Patrick Huemoeller, David Jon Hiner
  • Patent number: 10672699
    Abstract: A semiconductor device with redistribution layers on partial encapsulation is disclosed and may include providing a carrier with a non-photosensitive protection layer, forming a pattern in the non-photosensitive protection layer, providing a semiconductor die with a contact pad on a first surface, and bonding the semiconductor die to the non-photosensitive protection layer such that the contact pad aligns with the pattern formed in the non-photosensitive protection layer. A second surface opposite to the first surface of the semiconductor die, side surfaces between the first and second surfaces of the semiconductor die, and a portion of a first surface of the non-photosensitive protection layer may be encapsulated with an encapsulant. The carrier may be removed leaving the non-photosensitive protection layer bonded to the semiconductor die. A redistribution layer may be formed on the contact pad and a second surface of the non-photosensitive protection layer opposite to the first surface.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: June 2, 2020
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventors: Jong Sik Paek, Jin Young Kim, YoonJoo Kim, Jin Han Kim, SeungJae Lee, Se Woong Cha, SungKyu Kim, Jae Hun Bae, Dong Jin Kim, Doo Hyun Park
  • Patent number: 10665567
    Abstract: A method of forming an electronic component package includes coupling a first surface of an electronic component to a first surface of a first dielectric strip, the electronic component comprising bond pads on the first surface; forming first via apertures through the first dielectric strip to expose the bond pads; and filling the first via apertures with an electrically conductive material to form first vias electrically coupled to the bond pads. The bond pads are directly connected to the corresponding first vias without the use of a solder and without the need to form a solder wetting layer on the bond pads.
    Type: Grant
    Filed: January 16, 2018
    Date of Patent: May 26, 2020
    Assignee: Amkor Technology, Inc.
    Inventors: Ronald Patrick Huemoeller, Sukianto Rusli, David Razu
  • Publication number: 20200153082
    Abstract: A packaged electronic device includes an integrated antenna as part of a conductive leadframe. The conductive leadframe includes a die paddle have an elongated conductive beam structure configured as a transmission line, and a ground plane structure disposed surrounding the die paddle. The ground plane includes a gap where the transmission line extends to an edge of the packaged electronic device. In one embodiment, selected leads within the leadframe are configured with conductive connective structures as ground pins, source pins, and/or wave guides. In an alternate embodiment, a portion of the integrated antenna is embedded and partially exposed within the body of the packaged electronic device.
    Type: Application
    Filed: January 12, 2020
    Publication date: May 14, 2020
    Applicant: Amkor Technology, Inc.
    Inventor: Marc Alan MANGRUM
  • Publication number: 20200144164
    Abstract: A packaged electronic device includes a substrate having a lead. The lead includes an outward facing side surface having a first height, and an inward facing side surface having a second height that is less than the first height. An electronic device is electrically connected to the lead. A package body encapsulates the electronic device and portions of the lead. The outward facing side surface is exposed through a side surface of the package body, and the inward facing side surface is encapsulated by the package body. A conductive layer is disposed on the outward facing side surface to provide the packaged electronic device with an enhanced wettable flank. In one embodiment, the electronic device is electrically connected to a thick terminal portion having the outward facing side surface. In another embodiment, the electronic device is electrically connected to a thin terminal portion having the inward facing side surface.
    Type: Application
    Filed: January 4, 2020
    Publication date: May 7, 2020
    Applicant: Amkor Technology, Inc.
    Inventor: Pedro Joel Rivera-Marty
  • Patent number: 10636717
    Abstract: A fingerprint sensor package, including a sensing side for sensing fingerprint information and a separate connection side for electrically connecting the fingerprint sensor package to a host device, is disclosed. The fingerprint sensor package can also include a sensor integrated circuit facing the sensing side and substantially surrounded by a fill material. The fill material includes vias at peripheral locations around the sensor integrated circuit. The fingerprint sensor package can further include a redistribution layer on the sensing side which redistributes connections of the sensor integrated circuit to the vias. The connections can further be directed through the vias to a ball grid array on the connection side. Some aspects also include electrostatic discharge traces positioned at least partially around a perimeter of the connection side. Methods of manufacturing are also disclosed.
    Type: Grant
    Filed: September 5, 2017
    Date of Patent: April 28, 2020
    Assignee: Amkor Technology, Inc.
    Inventors: Ronald Patrick Huemoeller, David Bolognia, Robert Francis Darveaux, Brett Arnold Dunlap
  • Publication number: 20200126929
    Abstract: A method for forming a semiconductor device with an electromagnetic interference shield is disclosed and may include coupling a semiconductor die to a first surface of a substrate, encapsulating the semiconductor die and portions of the substrate using an encapsulant, placing the encapsulated substrate and semiconductor die on an adhesive tape, and forming an electromagnetic interference (EMI) shield layer on the encapsulant, on side surfaces of the substrate, and on portions of the adhesive tape adjacent to the encapsulated substrate and semiconductor die. The adhesive tape may be peeled away from the encapsulated substrate and semiconductor die, thereby leaving portions of the EMI shield layer on the encapsulant and on the side surfaces of the substrate with other portions of the EMI shield layer remaining on portions of the adhesive tape. Contacts may be formed on a second surface of the substrate opposite to the first surface of the substrate.
    Type: Application
    Filed: September 26, 2019
    Publication date: April 23, 2020
    Applicant: Amkor Technology, Inc.
    Inventors: Jin Suk Jeong, Kyeong Sool Seong, Kye Ryung Kim, Young Ik Kwon, Ki Dong Sim
  • Patent number: 10600755
    Abstract: Various aspects of this disclosure provide a method of manufacturing an electronic device and an electronic device manufactured thereby. As a non-limiting example, various aspects of this disclosure provide a method of manufacturing an electronic device, and an electronic device manufactured thereby, that utilizes ink to form an intermetallic bond between respective conductive interconnection structures of a semiconductor die and a substrate.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: March 24, 2020
    Assignee: Amkor Technology, Inc.
    Inventors: Hwan Kyu Kim, Dae Gon Kim, Tae Kyeong Hwang, Ji Young Chung, Kwangmo Chris Lim
  • Patent number: 10586761
    Abstract: A semiconductor device structure, for example a 3D structure, and a method for fabricating a semiconductor device. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for manufacturing thereof, that comprise interposer, interlayer, and/or heat dissipater configurations that provide for low cost, increased manufacturability, and high reliability.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: March 10, 2020
    Assignee: Amkor Technology, Inc.
    Inventors: Keun Soo Kim, Jae Yun Kim, Byoung Jun Ahn, Dong Soo Ryu, Dae Byoung Kang, Chel Woo Park