Abstract: In one example, a semiconductor device comprises a main substrate comprising a first side and a main conductive structure, and a first component module over the first side of the main substrate. The first component module comprises a first electronic component and a first module encapsulant contacting a lateral side of the first electronic component. The semiconductor device further comprises a second component module over the first side of the main substrate. The second component module comprises a second electronic component and a second module encapsulant contacting a lateral side of the second electronic component. The semiconductor device further comprises a main encapsulant over a first side of the main substrate and between the first component module and the second component module. Other examples and related methods are also disclosed herein.

Abstract: Provided are a semiconductor device using, for example, an epoxy molding compound (EMC) wafer support system and a fabricating method thereof, which can, for example, adjust a thickness of the overall package in a final stage of completing the device while shortening a fabricating process and considerably reducing the fabrication cost. An example semiconductor device may comprise a first semiconductor die that comprises a bond pad and a through silicon via (TSV) connected to the bond pad; an interposer comprising a redistribution layer connected to the bond pad or the TSV and formed on the first semiconductor die, a second semiconductor die connected to the redistribution layer of the interposer and positioned on the interposer; an encapsulation unit encapsulating the second semiconductor die, and a solder ball connected to the bond pad or the TSV of the first semiconductor die.

Abstract: In one example, a semiconductor device comprises a spacer substrate, a first lens substrate over the first spacer substrate, and a lens protector over the first lens dielectric adjacent to the first lens. The spacer substrate comprises a spacer dielectric, a spacer top terminal, a spacer bottom terminal, and a spacer via. The first lens substrate comprises a first lens dielectric, a first lens, a first lens top terminal, a first lens bottom terminal, and a first lens via. A first interconnect is coupled with the spacer top terminal and the first lens bottom terminal. Other examples and related methods are also disclosed herein.

Abstract: A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise an interconnection structure, for example a bond wire, at least a portion of which extends into a dielectric layer utilized to mount a plate, and/or that comprise an interconnection structure that extends upward from the semiconductor die at a location that is laterally offset from the plate.

Abstract: In one example, a semiconductor structure comprises a redistribution structure comprising a conductive structure, a cavity substrate on a top side of the redistribution structure and having a cavity and a pillar contacting the redistribution structure, an electronic component on the top surface of the redistribution structure and in the cavity, wherein the electronic component is electrically coupled with the conductive structure, and an encapsulant in the cavity and on the top side of the redistribution structure, contacting a lateral side of the electronic component, a lateral side of the cavity, and a lateral side of the pillar. Other examples and related methods are also disclosed herein.

Abstract: In one example, a semiconductor device comprises a main substrate having a top side and a bottom side, a first electronic component on the top side of the main substrate, a second electronic component on the bottom side of the main substrate, a substrate structure on the bottom side of the main substrate adjacent to the second electronic component, and an encapsulant structure comprising an encapsulant top portion on the top side of the main substrate and contacting a side of the first electronic component, and an encapsulant bottom portion on the bottom side of the main substrate and contacting a side of the second electronic component and a side of the substrate structure. Other examples and related methods are also disclosed herein.

Abstract: In one example, a semiconductor device comprises a base assembly comprising a first substrate, a first device on a top surface of the first substrate, and a first encapsulant on the top surface of the first substrate and bounding a side surface of the first device. The semiconductor device further comprises a conductive pillar on the first substrate and in the first molding compound, wherein the conductive pillar comprises a non-conductive pillar core and a conductive pillar shell on the pillar core.

Abstract: A semiconductor package and a method of manufacturing a semiconductor package. As a non-limiting example, various aspects of this disclosure provide a semiconductor package, and method of manufacturing thereof, that comprises a substrate having a first surface and a second surface opposite to the first surface, and comprising at least one first recess portion formed in a direction ranging from the first surface toward the second surface, a plurality of first recess conductive patterns formed in the first recess portion, and a first passive element inserted into the first recess portion of the substrate and having a first electrode and a second electrode electrically connected to the plurality of first recess conductive patterns.

Abstract: Provided are a method for fabricating a semiconductor package and a semiconductor package using the same, which can simplify a fabricating process of the semiconductor package by forming a lead frame on which a semiconductor die can be mounted without a separate grinding process, and can improve product reliability by preventing warpage from occurring during a grinding process.

Abstract: An exemplary semiconductor device can comprise (a) a substrate comprising a substrate dielectric structure between the substrate top side and the substrate bottom side, conductive pads at the substrate bottom side, and a substrate cavity through the substrate dielectric structure, (b) a base electronic component comprising inner short bumps; outer short bumps bounding a perimeter around the inner short bumps, and tall bumps between the outer short bumps and an edge of the base component top side, and (c) a mounted electronic component coupled to the inner short bumps of the base electronic component. The tall bumps of the base component can be coupled to the conductive pads of the substrate. The mounted electronic component can be located in the substrate cavity. The substrate bottom side can cover at least a portion of the outer short bumps of the base electronic component. Other examples and related methods are disclosed herein.

Abstract: A packaged electronic device structure includes a substrate having a major surface. A semiconductor device is connected to the major surface of the substrate, the semiconductor device having a first major surface, a second major surface opposite to the first major surface, and a side surface extending between the first major surface and the second major surface. A package body encapsulates a portion of the semiconductor device, wherein the side surface of the semiconductor device is exposed through a side surface of the package body. In some examples, the side surface of the semiconductor device is an active surface. In some examples, the package body comprises a molded structure that contacts and overlaps the first major surface of the semiconductor device.

Abstract: In one example, a semiconductor device comprises a first substrate comprising a first conductive structure, a first body over the first conductive structure and comprising an inner sidewall defining a cavity in the first body, a first interface dielectric over the first body, and a first internal interconnect in the first body and the first interface dielectric, and coupled with the first conductive structure. The semiconductor device further comprises a second substrate over the first substrate and comprising a second interface dielectric, a second body over the second interface dielectric, and a second conductive structure over the second body and comprising a second internal interconnect in the second body and the second interface dielectric. An electronic component is in the cavity, and the second internal interconnect is coupled with the first internal interconnect. Other examples and related methods are also disclosed herein.

Abstract: In one example, a semiconductor device, comprises a first redistribution layer (RDL) substrate comprising a first dielectric structure and a first conductive structure through the first dielectric structure and comprising one or more first conductive redistribution layers, an electronic component over the first RDL substrate, wherein the electronic component is coupled with the first conductive structure, a body over a top side of the first RDL substrate, wherein the electronic component is in the body, a second RDL substrate comprising a second dielectric structure over the body, and a second conductive structure through the second dielectric structure and comprising one or more second conductive redistribution layers, and an internal interconnect coupled between the first conductive structure and the second conductive structure. Other examples and related methods are also disclosed herein.

Abstract: In one example, a semiconductor device, comprising a substrate having a top side and a bottom side, an electronic device on the top side of the substrate, a first encapsulant on the top side of the substrate contacting a side of the electronic device, a second encapsulant on the bottom side of the substrate, wherein the second encapsulant includes an undercut at an end of the second encapsulant, and a cover layer comprising a top cover on a top side of the first encapsulant and a side cover on a side of the first encapsulant and a side of the substrate, wherein the side cover extends adjacent to the undercut. Other examples and related methods are also disclosed herein.

Abstract: In one example, a semiconductor device comprises a substrate comprising a dielectric, a first conductor on a top side of the dielectric, and a second conductor on a bottom side of the dielectric, wherein the dielectric has an aperture, and the first conductor comprises a partial via contacting a pad of the second conductor through the aperture, an electronic device having an interconnect electrically coupled to the first conductor, and an encapsulant on a top side of the substrate contacting a side of the electronic device. Other examples and related methods are also disclosed herein.

Abstract: In one example, a semiconductor device structure relates to an electronic device, which includes a device top surface, a device bottom surface opposite to the device top surface, device side surfaces extending between the device top surface and the device bottom surface, and pads disposed over the device top surface. Interconnects are connected to the pads, and the interconnects first regions that each extend from a respective pad in in an upward direction, and second regions each connected to a respective first region, wherein each second region extends from the respective first region in a lateral direction. The interconnects comprise a redistribution pattern on the pads. Other examples and related methods are also disclosed herein.

Abstract: A semiconductor device includes a lead frame, an electronic device, a package body, and a first shield plate. The lead frame includes a die mount structure, signal leads, a first shield lead, a second shield lead, and a first shield mount that spans the first and second shield leads. The electronic device can be mounted to the die mount structure and can be coupled to the signal leads. The package body encapsulates the electronic device and the lead frame such that (i) each of the first shield lead, the second shield lead, and the signal leads includes an external portion that extends beyond the exterior surface of the package body, and (ii) the first shield mount extends beyond the exterior surface of the package body. The first shield plate can be coupled to the first shield mount.

Abstract: A semiconductor device structure, for example a 3D structure, and a method for fabricating a semiconductor device. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for manufacturing thereof, that comprise interposer, interlayer, and/or heat dissipater configurations that provide for low cost, increased manufacturability, and high reliability.

Abstract: A semiconductor device structure and a method for manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device structure (e.g., a sensor device structure), and method for manufacturing thereof, that comprises a three-dimensional package structure free of wire bonds, through silicon vias, and/or flip-chip bonding.

Abstract: A semiconductor device includes a semiconductor die, a redistribution structure, a interconnection structure, and a thermal path structure. The redistribution structure includes an insulation layer over a first surface of the semiconductor die and a conductive trace separated from the first surface by the insulation layer. The conductive trace extends laterally over the first surface from a first end toward a second end that is electrically coupled to a bond pad on the first surface of the semiconductor die. The interconnection structure is coupled to the first end of the conductive trace. The thermal path structure provides a thermal path between the semiconductor die and the interconnection structure. In some embodiment, the thermal path structure comprises a thermal pad that passes through the insulation layer. In other embodiments, the thermal path structure comprises a dummy pad on the first surface of the semiconductor die.