Abstract: A power supply management controller integrated circuit for managing power supply to system units of a system, comprising power supply means for powering the system units, a power supply control unit for controlling the powering, a wake-up timer unit, and means for acknowledging an active or passive state of the system, wherein the power supply control unit is arranged for cooperating with the means for acknowledging the state of the system for enabling the power supply control unit to cease powering of the system units for de-activation of the system during the passive state of the system, and for enabling the power supply control unit to maintain powering during an active state of the system, and wherein the power supply control unit is arranged for cooperating with the wake-up timer unit for periodically powering the system units during the passive state of the system for enabling activation of the system.

Abstract: The present invention is directed to an oscillator circuit comprising an oscillator input for providing an input signal, a first integrator circuit comprising a first integrator capacitor and a first integrator output, a comparator, a discharge circuit for discharging said first integrator capacitor once per cycle of said oscillator circuit, and an oscillator output for providing an output signal, wherein said oscillator circuit further comprises a second integrator circuit comprising a second integrator capacitor and a second integrator output, and wherein said oscillator circuit is arranged for allowing said input signal to be subsequently integrated by said first and second integrator circuit in an alternating manner, and for providing said integrated output signal of said first and second integrator circuit subsequently to said comparator in said alternating manner.

Abstract: The present invention is directed to an oscillator circuit comprising an oscillator input for providing an input signal, a first integrator circuit comprising a first integrator capacitor and a first integrator output, a comparator, a discharge circuit for discharging said first integrator capacitor once per cycle of said oscillator circuit, and an oscillator output for providing an output signal, wherein said oscillator circuit further comprises a second integrator circuit comprising a second integrator capacitor and a second integrator output, and wherein said oscillator circuit is arranged for allowing said input signal to be subsequently integrated by said first and second integrator circuit in an alternating manner, and for providing said integrated output signal of said first and second integrator circuit subsequently to said comparator in said alternating manner.