Abstract: In a control circuit and method for a high efficiency and low EMI switching amplifier, an input signal is compared with a reference signal to generate a comparison signal, and a control signal is generated in response to the comparison signal for a driver to generate an output signal. The output signal is fed back to control the slope of the reference signal in association with an initial level set for the reference signal to provide a minimum on-time period for the output signal. Alternatively, a reference value is provided to compare with the reference signal for setting a minimum on-time period for the output signal.

Abstract: In a switching amplifier for generating a pair of output signals of square waves in response to an input signal, when the input signal is zero, the first output signal has a first duty cycle and the second output signal has a second duty cycle; when the input signal is greater than zero, the first output signal has a third duty cycle varying with the input signal and the second output signal still has the second duty cycle; and when the input signal is less than zero, the first output signal has the first duty cycle and the second output signal has a fourth duty cycle varying with the input signal. The first and second duty cycles are very small but equal to each other in size, and the phase difference between the first and second output signals could range from 0 to 180 degrees.

Abstract: In a control circuit and method for a high efficiency and low EMI switching amplifier, an input signal is compared with a reference signal to generate a comparison signal, and a control signal is generated in response to the comparison signal for a driver to generate an output signal. The output signal is fed back to control the slope of the reference signal in association with an initial level set for the reference signal to provide a minimum on-time period for the output signal. Alternatively, a reference value is provided to compare with the reference signal for setting a minimum on-time period for the output signal.

Abstract: In a DC-to-DC converter, a current sense circuit and method generate a first current by a first transconductive amplifier responsive to the output current of the converter for a controller to switch a high side switch and a low side switch, a second current from a first voltage by a second transconductive amplifier, a second voltage from the second current by an adjustable resistor, and a bias signal from a difference between the second voltage and a third voltage by a bias apparatus to adjust the transconductances of the first and second transconductive amplifiers.

Abstract: In an amplifier circuit with reduced power-off transients, an amplifier is provided for receiving an input signal and a reference signal to generate an output signal therefrom when it is enabled, and the amplifier is disabled when the supply voltage to the amplifier drops down to a threshold or to a level higher than the reference signal a threshold. The output stage transistor of the amplifier is applied with a body voltage to suppress the body diode parasitic to the output stage transistor to be forward-biased.

Abstract: In an amplifier circuit with reduced power-on transients, an amplifier has a gain to generate an output signal from an input signal and a reference signal when it is enabled, and a control circuit generates a control signal, based on the output signal and the reference signal, to be supplied to the amplifier during a power-on event. The amplifier is enabled by the control signal when the reference signal reaches the level of the output signal.

Abstract: A contact process for a semiconductor device containing a base region of a first conductivity type formed on a semiconductor substrate comprises formation of a first shallow layer of the first conductivity type on the base region, deposition of an insulator on the first shallow layer, etching the insulator and first shallow layer to form a contact hole, thermally driving the first shallow layer more deeply into said base region, formation of a second shallow layer of a second conductivity type on the base region at the bottom of the contact hole, filling a metal in the contact hole to contact the sidewall of the first shallow layer and the second shallow layer.

Abstract: In a voltage mode buck converter having a pair of switches connected in series by a phase node to be switched by a pair of drive signals generated from a first control signal, a phase resistor is connected between a multifunction pin and the phase node, and a controller generates a second control signal and a third control signal from the second drive signal to sense the voltage on the multifunction pin respectively to generate an over-current signal and a CCM mode switch signal to switch the converter between a CCM mode and a DCM mode.

Abstract: A method for manufacturing a trench gate structure of a power metal-oxide-semiconductor field-effect transistor. A substrate is provided, which substrate has a epitaxial layer thereon, a base region formed in the epitaxial layer, a source region formed in a portion of the base region, a first dielectric layer on the base region and the source region, a second dielectric layer on the first dielectric layer and a trench penetrating through the second and the first dielectric layers, the source region and the base region and into the epitaxial layer. A third dielectric layer is formed on the bottom of the trench. A conformal gate oxide layer is formed in the trench. A conformal polysilicon layer is formed on the second dielectric layer and in the trench. A fourth dielectric layer is formed on the polysilicon layer to fill the trench.

Abstract: A power chip set for a switching mode power supply includes a high voltage chip and a control unit chip. The high voltage chip contains a switching power metal-oxide-semiconductor (MOS) transistor being turned on/off under control of an output signal from the control unit, and a junction field effect transistor (JFET) coupled between a drain of the switching power MOS transistor and a power terminal of the control unit to serve as a start up element for driving the control unit during initiation, in which the JFET has a negative threshold voltage and the absolute value thereof is equal to the voltage for driving the control unit. The JFET structure in the high voltage chip further includes a Zener diode for over voltage protection of the control unit. The high voltage chip further contains a current-sense power MOS transistor coupled with the drain of the switching power MOS transistor for detecting a drain current of the switching power MOS transistor. The chip set can be packaged into a power module.

Abstract: A latch-up controllable insulated gate bipolar transistor is formed with a thyristor structure, which has a first region of a first conductivity type, a second region of a second conductivity type formed on the first region, a third region of the first conductivity type formed on the second region, and a fourth region of the second conductivity type contacting the third region and forming a P-N junction therewith. The first and third regions contact a first and second electrode regions respectively. A first field effect transistor means for controlling conduction between the fourth region and the second region in response to an actuation bias; and a second field effect transistor means between the fourth region and the second electrode region for turning the thyristor off in response to a cutoff bias.

Abstract: A control circuit for Hall-effect switching device is provided. The control circuit can be used in a Hall-effect switching device to control the output of the Hall-effect switching device in response to Hall effect. The control circuit comprises a current source and two pairs of symmetrically arranged bipolar junction transistors (BJT). The particular arrangement of the BJTs allow the Hall-effect sensitivity by the Hall-effect switching device to be enhanced. The Hall-effect sensitivity can be adjusted by varying the current source in the control circuit. Moreover, the control circuit is designed with a double-output feature that allows the Hall-effect switching device to be realizable with a fewer number of transistors, allowing the Hall-effect switching device to operate with a lower working current and a lower starting voltage as compared to the prior art, thus considerably reducing power consumption.