Abstract: Many systems implement calibration schemes to measure and correct for the non-idealities. Such systems can be complex, which makes them impractical to implement since the cost can potentially outweigh the benefits of the calibration scheme. To implement efficient and effective calibration, non-idealities or errors of a system are detected, in foreground or in background, in a piecewise fashion based on, e.g., correlations of an output signal with an uncorrelated random signal, where the correlation results are processed separately for different open intervals of an error signal. Second order and third order correction terms can be easily determined based on three open intervals. In various embodiments, the calibration scheme can detect and correct for linear errors, (linear and non-linear) memory/frequency dependent errors, static nonlinearity errors, Hammerstein-style non-linearity errors, and Wiener-style non-linearity errors (cross-terms).

Abstract: Circuits are used to sense and compensate or mitigate the imbalance errors, hence restoring the intended benefits of differential processing. In particular, the impedance mismatch between the positive and negative branches of a balanced system is sensed by digitizing an error voltage developed by injecting suitable common mode stimuli. The mismatch is then trimmed out by introducing and properly setting up a digitally controlled impedance that counters the original impedance mismatch and hence rebalances the signal path on-situ and prior to exercising the signal processing chain.

Abstract: In an example, there is disclosed a computing apparatus, having: a first master having a first ordinal quality of service (QoS) profile; a second master having a second ordinal QoS profile, wherein the second ordinal QoS profile is higher in order than the first ordinal QoS profile; a slave; a multiplexed interconnect to communicatively couple the first master and second master to the slave with a priority according to the ordinal QoS profiles; and one or more logic elements, including at least one hardware logic element, providing a QoS engine to: determine that the first master has initiated a slave operation via the interconnect; determine that completing the slave operation according to a QoS criterion provided by the second master requires elevated QoS; and promote the first master to a third ordinal QoS profile having an order higher than the second ordinal QoS profile.

Abstract: Many systems implement calibration schemes to measure and correct for the non-idealities. Such systems can be complex, which makes them impractical to implement since the cost can potentially outweigh the benefits of the calibration scheme. To implement efficient and effective calibration, non-idealities or errors of a system are detected, in foreground or in background, in a piecewise fashion based on, e.g., correlations of an output signal with an uncorrelated random signal, where the correlation results are processed separately for different open intervals of an error signal. Second order and third order correction terms can be easily determined based on three open intervals. In various embodiments, the calibration scheme can detect and correct for linear errors, (linear and non-linear) memory/frequency dependent errors, static nonlinearity errors, Hammerstein-style non-linearity errors, and Wiener-style non-linearity errors (cross-terms).

Abstract: Heart rate monitors are plagued by noisy photoplethysmography (PPG) data, which makes it difficult for the monitors to output a consistently accurate heart rate reading. Noise is often caused by motion. Using known methods for processing accelerometer readings that measure movement to filter out some of this noise may help, but not always. The present disclosure describes an improved front-end technique (time-domain interference removal) based on using adaptive linear prediction on accelerometer data to generate filters for filtering the PPG signal prior to tracking the frequency of the heartbeat (heart rate). The present disclosure also describes an improved back-end technique based on steering the frequency of a resonant filter in order to track the heartbeat. Implementing one or both of these techniques leads to more accurate heart rate measurements.

Abstract: Disclosed herein are systems and technique for distributed audio coordination over a two-wire communication bus. For example, in some embodiments, a first slave device may include circuitry to receive, over a two-wire bus a synchronization control frame, audio data, and a dynamics processor (DP) parameter for a second audio device coupled to a second slave device. The first slave device may include circuitry to derive timing information from the synchronization control frame, and circuitry to provide the audio data and a DP parameter (based on the DP parameter for the second audio device) to a first audio device coupled to the first slave device.

Abstract: An authentication system and device including physical unclonable function (PUF) and threshold cryptography comprising: a PUF device having a PUF input and a PUF output and constructed to generate, in response to the input of a challenge, an output value characteristic to the PUF and the challenge; and a processor having a processor input that is connected to the PUF output, and having a processor output connected to the PUF input, the processor configured to: control the issuance of challenges to the PUF input via the processor output, receive output from the PUF output, combine multiple received PUF output values each corresponding to a share of a private key or secret, and perform threshold cryptographic operations. The system and device may be configured so that shares are refreshable, and may be configured to perform staggered share refreshing.

Abstract: Disclosed herein are systems and techniques for peripheral device diagnostics and control over a two-wire communication bus. For example, in some embodiments, a slave device may include circuitry to receive a synchronization control frame from an upstream device, receive audio data from the upstream device subsequent to receipt of the synchronization control frame, provide a synchronization response frame toward the upstream device, and provide first data representative of an operational characteristic of an audio device coupled to the slave device subsequent to provision of the synchronization response frame; circuitry to derive timing information from the synchronization control frame; and circuitry to provide the audio data to the audio device, and receive, from a sensor coupled to the slave device, second data representative of the operational characteristic of the audio device.

Abstract: A DC-DC converter for supplying a gradually increasing voltage via a soft start circuit from a first powered domain to a second unpowered domain. The powered domain may be connected to a primary winding of a first transformer, and the unpowered domain may be connected to the secondary winding of the first transformer. The unpowered domain may respond to an applied voltage from the soft start circuit by supplying a feedback signal to the powered domain via a feedback circuit. The feedback signal indicates the power supplied from the secondary winding of the first transformer to the unpowered domain is satisfactory.

Abstract: A method for generating a Fast Fourier Transform (FFT) is disclosed. The method includes providing an input signal to two or more fixed-point FFT algorithms that apply different scaling to reduce growth of their output, resulting in each of the FFT algorithms yielding an array of FFT output values characterized by a different gain. The method further includes determining, on a per-FFT output value basis, whether an output value of an FFT algorithm with a relatively high gain was clipped due to saturation. If not, then the output value of that FFT algorithm is included in the final FFT. Otherwise, an output value of an FFT algorithm with a lower gain is included in the final FFT. Reconstructing the final FFT by such combination of values from different FFTs allows benefiting from the advantages of both higher- and lower-gain FFTs while avoiding or minimizing their disadvantages.

Abstract: Serial data transfer uses ever increasing transmission rates. The data transfer rate of a clock-and-data recovery (CDR) deserializer can be increased by using multiple independent sampler blocks that process serial input data in parallel. For this purpose, the clock output signals from the various independent blocks are first mutually aligned in proper order using a lower speed clock, and subsequently offset from one another such that sampling instances of the various sampler blocks are interleaved. Digitized data words corresponding to common input data and outputted by the various sampler blocks are compared after alignment of the clock output signals to correct additional timing misalignment between the multiple sampler blocks. The digitized data words need only be aligned once or at most infrequently after the clock output signals are aligned, since the additional timing misalignment is caused mainly path delays that are substantially invariant over time.

Abstract: A microelectromechanical systems (MEMS) sensor device with a compound folded tether is disclosed. The compound folded tether connects a movable proof mass to a substrate, and includes folds composed of multiple short segments aligned with each other to form a longer composite segment having multiple breaks along its length. The use of multiple short segments to create a longer composite segment of the folded tether provides the tether with increased stiffness without altering the fundamental resonance frequency of the tether. The increased stiffness can beneficially lower the occurrence of stiction. Moreover, such a tether configuration provides larger separation between the tether's fundamental resonance frequency and higher order resonant mode frequencies, meaning that the higher order modes may be suppressed in typical operation of the MEMS sensor device.

Abstract: An RF peak-detector circuit can operate over a wide range and can compensate or correct an output voltage error term that depends on the thermal voltage and the input signal voltage. At or near a minimum value of the input signal voltage range, such compensation can include a scaled base-emitter ratioing of bipolar junction transistors used to generate the output voltage, each of which can be biased by a primary current. At or near a maximum value of the input signal voltage range, this can include using an auxiliary bias current circuit that can shift auxiliary bias current between these bipolar junction transistors. The auxiliary bias current circuit can include scaled bipolar junction transistors in a cross-coupled configuration and an equivalent resistance circuit between emitters of the cross-coupled BJTs. This can provide a robust approach for improving the accuracy of an RF peak-detector circuit over a wide range.

Abstract: Microelectromechanical systems (MEMS) devices are described that include a proof mass movably connected to a substrate by accordion springs disposed on opposite sides of the proof mass, with a coupler coupling two of the accordion springs together. The coupler is a bar in some implementations, and may be rigid. The coupler therefore restricts the motion of the accordion springs relative to each other. In this manner, the motion of the proof mass may be restricted to preferred types and frequencies.

Abstract: One-axis and two-axis vibratory gyroscopes include a unitary resonator structure conceptually having four beams interconnected in a cross-hatch configuration. While each beam can be considered a unitary piece of material, each beam's attachment to two cross beams conceptually divides the resonant beam into a central section between the attachment points and two tail sections aft of the attachment points. The attachment points are preferably nodal points of the beam with respect to both a drive mode shape and a sense mode shape of the beam for the resonant mode in which the resonator is configured to operate. Thus, the location where two beams intersect is preferably a nodal point for both beams. The tail sections of each beam allow the resonant mode of the resonator to be carefully configured.

Abstract: A crosspoint switch matrix may include a plurality of point cells provided at intersections between a plurality of input pathways and a plurality of output pathways. The input pathways may be partitioned into groups, each group defined by a demultiplexer that forwards an input signal to the point cells within the group and/or to a demultiplexer of a succeeding group. The output pathways may be partitioned into groups, each group defined by a multiplexer that forwards a signal from an active point cell to an output of the matrix. Multiplexers of groups in intermediate positions between the point cell and the matrix output may relay the output signal between the multiplexers along a bypass pass. When both the input pathways and output pathways are so partitioned, each point cell may be a member of one input pathway group and one output pathway group.

Abstract: Aspects of this disclosure relate to a first die includes an LC resonant circuit including a first capacitive element, such as a capacitor or a varactor, and an inductive element. The LC resonant circuit is configured to generate a signal having a frequency of oscillation. The first die includes bump pads electrically coupled to both ends of the first capacitive element. A second die can be flip chip mounted on the first die. Bumps can electrically connect a second capacitive element of the second die in parallel with the first capacitive element of the first die. This can increase the Q factor of the LC resonant circuit.

Abstract: An accelerometer has a movable mass suspended above a substrate, and a variable acceleration capacitor supported by the substrate. The movable mass has a mass anchor securing the mass to the substrate, while the acceleration capacitor has both a stationary finger extending from the substrate, and a movable finger extending from the movable mass. The accelerometer also has a variable stress capacitor, which also includes the stress finger, for determining movement of the mass anchor relative to the substrate.

Abstract: Apparatus and methods for overvoltage switches with active leakage current compensation are provided. In certain configurations, an IC includes an input node and a protection device or overvoltage switch electrically connected to the input node. The protection device includes a first well and a second well. The second well is positioned adjacent to the first well and has a conductivity type opposite that of the first well. Additionally, a first terminal of the protection device is electrically connected to the first well and to the input node of the IC. The protection device further includes a leakage current compensation circuit that is used to control a voltage level of the second well based on a voltage level of the first terminal to inhibit a leakage current of the first terminal of the protection device.

Abstract: Aspects of the embodiments are directed to methods and imaging systems. The imaging systems can be configured to sense, by an light sensor of the imaging system, light received during a time period, process the light received by the light sensor, identify an available measurement period for the imaging system within the time period based on the processed light, and transmit and receive light during a corresponding measurement period in one or more subsequent time periods.