Abstract: A communication system for a power line is described. A transmission system of the communication system divides the time axis into a number of time slots synchronized such that one time slot can start about a zero crossing of the power line signal. These time slots are referred to as channels and are numbered from 1 to n. A modulation method is described to is narrow band continuous phase FSK, where a number m of modulating frequencies are used, arranged such that an integral number of full cycles fit into each channel time slot for all m frequencies. The system transmits during only a subset of the available time slots (channels) concentrated near the zero crossing of the power line waveform where the noise is typically minimal.

Abstract: A communication system for a power line is described. A transmission system of the communication system divides the time axis into a number of time slots synchronized such that one time slot can start about a zero crossing of the power line signal. These time slots may be referred to as channels. Data may initially be modulated into at least one of these time slots over a first transmission period according to a modulation scheme. The time slots and/or modulation scheme used in subsequent transmission periods may be adjusted depending on transmission feedback relating to prior modulated data.

Abstract: The invention provides a new approach which is better suited to FFT design as applied to multicarrier modulation systems such as OFDM. The signals are scaled so that overflow, rather than being completely avoided, occurs with low probability throughout the IFFT and FFT structures. The size of the error that results from an overflow depends on how overflow is handled in the DSP. To minimize the degradation, overflow should result in saturation of the value at the maximum positive or negative value option. This is equivalent to clipping the signal. Using the new technique, signals within the FFT structure are scaled to balance the effect of clipping and round-off. Clipping may result in comparatively large errors in a few signal values but because of the spreading effect of the FFT and because OFDM systems typically include error coding/correction, system performance depends on the total error or, in other words the total noise power, across all of the FFT outputs rather than on any individual value.

Abstract: The invention provides a new approach which is better suited to FFT design as applied to multicarrier modulation systems such as OFDM. The signals are scaled so that overflow, rather than being completely avoided, occurs with low probability throughout the IFFT and FFT structures. The size of the error that results from an overflow depends on how overflow is handled in the DSP. To minimize the degradation, overflow should result in saturation of the value at the maximum positive or negative value option. This is equivalent to clipping the signal. Using the new technique, signals within the FFT structure are scaled to balance the effect of clipping and round-off. Clipping may result in comparatively large errors in a few signal values but because of the spreading effect of the FFT and because OFDM systems typically include error coding/correction, system performance depends on the total error or, in other words the total noise power, across all of the FFT outputs rather than on any individual value.

Abstract: An input signal is a complex vector whose phase is a coherent measurement of the phase rotation occurring between two separated symbols of a received CDMA signal. A processing block (30) provides a first signal showing the magnitude and the sign of the imaginary part of the input signal, and a second signal showing the magnitude and sign of the real part of the input signal to an initialisation block (31). A quadrant determination block (32) examines the signs of the signals to determine the quadrant in which the phase of the input signal exists. A comparator block (33) determines if the magnitude of the first signal is greater than or equal to the magnitude of the second signal. If a negative determination is made, the magnitude of the first signal is doubled in a multiplication block (35) to form a multiplied signal, and a counter incremented, initially from zero. The comparator block (33) then determines if the multiplied signal is greater than or equal to the magnitude of the second signal.