Abstract: A device having a capacitive sampling structure that allows for removal of sampling noise can be implemented in a variety of applications. Noise cancellation can be achieved by storing on an auto-zero capacitor a scaled replica of kT/C noise by a mechanism of correlated sampling. In an example embodiment, a set of switches can be arranged such that, in switching, scaled thermal noise, generated in an acquisition phase in which a voltage signal is input to an input capacitor structure, is captured on an output capacitor structure and, in a conversion phase, the captured thermal noise is cancelled or compensated from an output of the output capacitor structure.

Abstract: Systems and methods for determining an angle of the light transmitted by an illumination source of a scanning LIDAR system are disclosed. An example LIDAR system includes a pattern, provided in an optical path of the light transmitted by the illumination source as the light is transmitted out of the system, and configured to reflect at least a portion of the transmitted light to be incident on at least one of one or more optical sensors of the LIDAR system. The LIDAR system further includes, or is associated with, a controller, configured to determine an angle of the transmitted light based on a light detected by at least one of the optical sensors, where at least a portion of the light detected by the optical sensor(s) includes at least a portion of the light transmitted by the illumination source and reflected by the pattern.

Abstract: This disclosure describes techniques for selecting one of a plurality of modes in which to operate an amplifier. The techniques include configuring input routing circuitry, coupled to first and second inputs of the amplifier, based on the selected one of the plurality of modes; selectively applying a resistance to an output of the amplifier, using feedback routing circuitry, based on the selected one of the plurality of modes; and selectively applying one of a plurality of reference voltages, using reference voltage routing circuitry, coupled to the first and the second inputs of the amplifier, based on the selected one of the plurality of modes.

Abstract: This disclosure describes techniques for controlling switching regulator switching operations. The techniques include selecting a given one of a plurality of clock signals based on a control signal. The techniques further include generating, by the switching regulator, an output voltage from an input voltage by controlling one or more switches according to a switching frequency that corresponds to the selected given one of the plurality of clock signals. The techniques further include varying the switching frequency of the switching regulator by changing a value of the control signal, used to select the given one of the plurality of clock signals, according to a given one of a plurality of refresh rate control signals that corresponds to the selected given one of the plurality of clock signals having respective values that correspond to respective ones of the plurality of refresh rate control signals.

Abstract: There is disclosed in one example a video processor, including: an input buffer to receive an input image; a slicer circuit to divide the input image into a plurality of N vertical slices; N parallel input buffers for de-rasterization; N parallel image scalers, wherein each scaler is hardware configured to scale in a raster form, one of the N vertical slices according to an image scaling algorithm; N parallel output buffers for rerasteriztion; and an output multiplexer to combine the scaled vertical slices into a combined scaled output image.

Abstract: A clamp circuit can control a clamp transistor such that a change in a photodiode current detection voltage signal in an optical receiver circuit can control the clamp transistor to change state when a difference of a clamp voltage and the photodiode current detection voltage signal exceeds a threshold voltage of the clamp transistor. Using a feedback loop, the clamp circuit can accurately clamp a current when the photodiode current is larger than a detect current threshold.

Abstract: Described are various techniques that can minimize the use of high-voltage devices in a unity-gain buffer that can be used in a high voltage application, while providing a circuit that generates an output that is an accurately buffered version of the input.

Abstract: A system and method for monitoring components of a vehicle includes a manager and a wireless node. The manager is positioned on the vehicle and configured to wirelessly transmit a wake signal in response to an event. The wireless node positioned to monitor a component of the vehicle and includes an antenna, a wakeup circuit, and a node transceiver. The wakeup circuit is connected to the antenna and configured to monitor for the wake signal, and the node transceiver is configured to perform wireless communication with the manager. The wakeup circuit is configured to power on the node transceiver upon receipt of the wake signal.

Abstract: There is disclosed herein a contactor for production testing of an electrical product, where the contactor includes an integrated circuit with memory. The integrated circuit may store information related to the contactor in the memory that may be useful for the production testing. For example, the memory may store information that that can be used for identifying the contactor and/or determining whether maintenance of the contactor should be performed to achieve proper results of the production testing.

Abstract: Accurately measuring bio-impedance is important for sensing properties of the body. Unfortunately, contact impedances can significantly degrade the accuracy of bio-impedance measurements. To address this issue, circuitry for implementing a four-wire impedance measurement can be configured to make multiple current measurements. The multiple current measurements set up a system of equations to allow the unknown bio-impedance and contact impedances to be derived. The result is an accurate bio-impedance measurement that is not negatively impacted by large contact impedances. Moreover, bad contacts with undesirably large impedances can be identified.

Abstract: Digital to analog conversion generates an analog output corresponding to a digital input by controlling unit elements or cells using data bits of the digital input. The unit elements or cells individually make a contribution to the analog output. Due to process, voltage, and temperature variations, the unit elements or cells may have mismatches. The mismatches can degrade the quality of the analog output. To extract the mismatches, a transparent dither can be used. The mismatches can be extracted by observing the analog output, and performing a cross-correlation of the observed output with the dither. Once extracted, the unit elements or cells can be adjusted accordingly to reduce the mismatches.

Abstract: A power combiner/divider circuit can be structured having a base structure with the addition of an odd-mode capacitor and a low pass network at an end of the base structure or structured having a base structure with the addition of an inductor and a high pass network at an end of the base structure. The power combiner/divider circuit can be implemented as a port coupled to multiple ports with low pass networks or high pass networks arranged at the ends of paths to the multiple ports. In embodiments using low pass base structures or low pass networks coupled to the base structures, inductors in such low pass sections can be positively coupled on a pair-wise basis.

Abstract: The present disclosure relates to a PUF apparatus for generating a persistent, random number. The random number is determined by selecting one or more PUF cells, each of which comprise a matched pair of capacitors that are of identical design, and determining a value that is accurately and reliably indicative of a random manufacturing difference between them, based in which the random number is generated. The random manufacturing differences between the capacitors creates the randomness in the generated random number. Furthermore, because the random manufacturing difference should be relatively stable over time, the generated random number should be persistent.

Abstract: A PoDL system uses a gyrator for DC coupling of DC power from a PSE to a wire pair, and/or decoupling DC power from a wire pair for a PD. The gyrators obviate the use of discrete inductors for DC-coupling/decoupling and can be formed as an integrated circuit. The gyrators use a small integrated capacitor and invert and multiply the capacitor effect to emulate an inductor. The gyrators present a high impedance to AC current and a low impedance to DC current. Various gyrator designs, such as positive and negative polarity gyrators, and configurations are disclosed. Gyrators are described with analog current limit and power switch control, so multiple functions are integrated on the same IC chip.

Abstract: Techniques for fine tuning efficiency of a power converter are provided. In an example, a method can include acquiring a plurality of samples of an electrical characteristic of the power converter over a range of switching frequencies of the power converter to provide a plurality of sample pairs, estimating a corner value of the electrical characteristic based on the plurality of samples pairs, estimating a corresponding frequency associated with the corner value of the electrical characteristic based on frequencies of the plurality of sample pairs, and setting a switching frequency of the power converter at the corresponding frequency.

Abstract: An LLCC Secondary Overtone Resonant (LLCC-SOR) power converter obtains dramatically higher efficiency with light loads by providing a resonance in the transformer secondary that is approximately tuned to an odd order overtone of the upper primary switching frequency, an upper frequency limit of the primary switching frequency, and a secondary duty cycle control that engages once the upper primary switching frequency limit is reached. The transformer circuit resonates in an LLCC-SOR mode that regulates the output voltage when the maximum frequency limit is reached. In operation, the gain of the resonant circuit is raised above its regulation point under light loads, forcing the controller into duty cycle mode. The secondary current completes an odd number of oscillations per single oscillation of the primary current, and the primary current returns to near zero after each switching transition. Also, a zero-voltage switching condition is maintained on the primary switch.

Abstract: Techniques are provided for containing magnetic fields generated by an integrated switching package and for reducing electromagnetic interference generated from an integrated switching package.

Abstract: Apparatus and methods for clock synchronization and frequency translation are provided herein. Clock synchronization and frequency translation integrated circuits (ICs) generate one or more output clock signals having a controlled timing relationship with respect to one or more reference signals. The teachings herein provide a number of improvements to clock synchronization and frequency translation ICs, including, but not limited to, reduction of system clock error, reduced variation in clock propagation delay, lower latency monitoring of reference signals, precision timing distribution and recovery, extrapolation of timing events for enhanced phase-locked loop (PLL) update rate, fast PLL locking, improved reference signal phase shift detection, enhanced phase offset detection between reference signals, and/or alignment to phase information lost in decimation.

Abstract: Apparatuses and methods related to digital mobile radio (DMR) with enhanced transceiver are disclosed herein. The transceiver detects waveforms of signals received by a digital mobile station radio (MS). By detecting whether the waveforms of the signals, the transceiver allows a digital baseband processor of the MS to remain in a sleep state while the signals are being detected by the DMR, thereby reducing an amount of power used while the signals are being detected.

Abstract: Isolators having a back-to-back configuration for providing electrical isolation between two circuits are described, in which multiple isolators formed on a single monolithic substrate are connect in series to achieve a higher amount of electrical isolation for a single substrate than for one of the isolators alone. A pair of isolators in the back-to-back configuration have top and bottom isolator components where the top isolator components are connected together and electrically isolated from the underlying substrate, resulting in floating top isolator components. The back-to-back isolator may provide one or more communication channels for transfer of information and/or power between different circuits.