Abstract: A fast, high-resolution A/D converter circuit includes a combination of a main-range up/down counter and a subrange A/D converter. An output from the up/down counter for upper bits is D/A-converted and subtracted from an input signal, and the remainder of subtraction is A/D-converted by the subrange A/D converter, thereby obtaining high-resolution conversion data. The circuit has a feedback loop which detects that the remainder becomes less than LSB of the up/down counter and stops a count operation. By discriminating that the remainder is more/less a predetermined level set higher than the LSB of the counter or outside/inside a predetermined range, a count rate is switched between high and low rates. The remainder enters subrange via the low rate count stage.
Abstract: The invention comprises an isolation amplifier including an input circuit and an output circuit coupled through an isolation transformer. A switching type balanced modulator modulates a square wave carrier with an analog signal input and delivers the resulting signal to the input of the isolation transformer. A demodulator in the output circuit inverts alternate points of the modulated square wave carrier to essentially reproduce the analog input. A sample and hold capacitor circuit connected to the output of the demodulator fills the gap between the trailing and leading edges of successive pulses.