Patents Assigned to Analog Power Intellectual Properties
  • Power MOSFETs and methods of making same
    Publication number: 20070075364
    Abstract: A MOSFET comprising an epitaxial layer of a semiconductor substrate of a first conductivity type, the MOSFET comprises a polysilicon gate, a source region of the first conductivity type and a body region of a second conductivity type, the polysilicon gate comprises a first layer of polysilicon and a second layer of polysilicon sandwiching a layer of polysilicon etch stop substances.
    Type: Application
    Filed: July 7, 2006
    Publication date: April 5, 2007
    Applicant: ANALOG POWER INTELLECTUAL PROPERTIES LIMITED
    Inventors: Kin Sin, Mau Lai, Duc Chau
  • Transistor having multiple gate pads
    Patent number: 6963140
    Abstract: Current practice of the common source configuration is to connect the sources of the two discrete MOSFETs (housed either in separated packages or in a single package) externally on the printed circuit board. Because the gate pads and source pads of the two dies are alternatively placed between gate and source, it does not allow the sources of the power MOSFETs to be connected internally, which requires an additional layer of circuit board to connect the sources and the gates externally. This invention provides a novel electronic device layout design and a novel packaging technique for common source configuration, placing two MOSFETs in a package with their sources connected to a single source post which is located between tow gate posts. In order to facilitate gate bonding and to prevent any shorting between gate and source, two gate pads are used and placed at the upper adjacent corners of each MOSFET.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: November 8, 2005
    Assignee: Analog Power Intellectual Properties
    Inventors: Johnny Kin-On Sin, Ming Liu, Tommy Mau-Lau Lai
  • Transistor having multiple gate pads
    Publication number: 20050073012
    Abstract: Current practice of the common source configuration is to connect the sources of the two discrete MOSFETs (housed either in separated packages or in a single package) externally on the printed circuit board. Because the gate pads and source pads of the two dies are alternatively placed between gate and source, it does not allow the sources of the power MOSFETs to be connected internally, which requires an additional layer of circuit board to connect the sources and the gates externally. This invention provides a novel electronic device layout design and a novel packaging technique for common source configuration, placing two MOSFETs in a package with their sources connected to a single source post which is located between tow gate posts. In order to facilitate gate bonding and to prevent any shorting between gate and source, two gate pads are used and placed at the upper adjacent corners of each MOSFET.
    Type: Application
    Filed: March 17, 2003
    Publication date: April 7, 2005
    Applicant: Analog Power Intellectual Properties Limited
    Inventors: Johnny Sin, Ming Liu, Tommy Lai