Abstract: High-Definition Multimedia Interface Specification, Version 1.2, supports multiple video formats. Currently the HDMI sources and sinks support multiple formats through reconfiguration of the system. The present invention describes the use of a configurable ‘n’בn’ data pixel mapping matrix for video format conversion. This mapping matrix allows the mapping of any existing video format to any other existing or future video format and allows flexibility of connectivity to any transmitter or receiver. Accordingly a more user friendly implementation that provides greater flexibility for development and use of new formats in video applications is shown.

Abstract: An apparatus and method for supplying power to the peripheral circuits of a transmitter circuit, especially an HDMI transmitter circuit, is disclosed. In an HDMI transmitter the termination resistors of the output driver are part of the receiver. DC power for the driver is supplied through these termination resistors. In prior art implementations of circuits this power, supplied by the receiver circuit, is wasted in the DC set-up circuit of the differential line driver. In various embodiments, this wasted power may be recovered from the remote termination to power selected peripheral circuits of the transmitter. The use of this wasted power may reduce the total system power consumption.

Abstract: A system and corresponding method for transferring data. Data may be selectively communicated via a USB port of a device. An indication of a device type may be received at the USB port from an external interface. USB protocol data or uncompressed high definition media data may be caused to be selectively supplied to the USB port as a function of the indication. The selected data may be transmitted via the USB port to an external interface. The uncompressed high definition media data may include at least one lane of media data or multimedia data in accordance with a DisplayPort standard. In some embodiments, either USB protocol data or multimedia data comprising audio data and uncompressed high definition video data may be caused to be selectively supplied to the USB port as a function of the indication. The indication may be a data format signal.

Abstract: Embodiments include systems and methods of powering data communications transmitter circuitry using current sinked from biasing circuitry used to bias a transmission line between the data communications transmitter circuitry and data communications receiver circuitry. In some embodiments, the current sinked from the biasing circuitry is sourced by a power supply configured to power the data communications receiver circuitry. The current sinked from the biasing circuitry is then re-used to power the data communications transmitter circuitry. The data communications transmitter circuitry can be operated using less power overall than the prior art by re-using the current first used to bias the transmission line to power the data communications transmitter circuitry. Various embodiments include HDMI transceivers, DVI transceivers, and DisplayPort transceivers.

Abstract: An apparatus and method for supplying power to circuits of an integrated circuit (IC) from the wasted power in low-swing high-speed differential line drivers used in the IC, is disclosed. In a high speed line driver the load resistors of the driver are connected to a power supply, either the local power supply or the receiver power supply. DC power for the driver is supplied through these resistors. A large portion of this power, supplied from the power supply is wasted in the DC set-up circuit of the differential line driver. It is proposed to use this wasted power to power selected circuits of an IC. The use of this wasted power from the drivers for powering the circuits reduces the overall power dissipation of the system.

Abstract: The system and method, applicable to video display port applications, reduces the jitter in a regenerated data stream clock by using a first-in first-out (FIFO) storage memory to average the variations thereto. The method comprises loading the data extracted from data packets, received over a high speed connection, into the FIFO and running the application using the data in the FIFO. An initial frequency value of the stream clock Fvid is generated from the link clock Flink. Two integer values received over the link, M and N, that establishes a relationship between Flink and Fvid, are used to initiate recovery of Fvid. Lower and upper limits are set for data in the FIFO and the value of Fvid is adjusted to keep the level of data stored in the FIFO within these limits. Accordingly, variations of Fvid are averaged over the limits of the FIFO, thereby reducing the jitter.

Abstract: The present invention provides a method and mechanism for data recovery with phase synchronized clock using interpolator and timing loop module and a data latching circuit. The interpolator can be considered as a programmable delay circuit with a specified delay resolution over the clock period.

Abstract: The present invention provides a method and mechanism for adapting a single phase-locked loop (PLL) for a wider range of frequencies than has been possible with prior art solutions. An analog comparator circuit that senses the output of a charge pump and provides a signal to a digital control circuit to choose a suitable load circuit for the PLL voltage controlled oscillator (VCO). The analog comparator with the digital control circuit changes the VCO loads to select the best VCO range to achieve the incoming signal frequency lock. A single PLL with the VCO load selection method disclosed, with use of built-in hysteresis, in addition to the phase and frequency feedback of the prior art, allows multiple overlapping frequency ranges to be covered in a stable fashion. This enables frequency locking of the PLL over a wide range of frequencies with a small die size and low power consumption.

Abstract: Signaling and coding methods and apparatus for long-range 10 and 100 mbps Ethernet transmission. In accordance with the method, a physical layer (PHY) device is provided that includes the long-range capabilities. In operation, the PHY measures the distance to a companion PHY, and if it is within the specification limits, communicates with the companion device in the normal way. If the distance is above the specification limits, the PHY checks to see if the companion PHY is similarly enabled, and if so, switches to a long-range signaling method. In a preferred embodiment, NRZ coding with pre-emphasis on the first bit of two or more bits of the same value is used for a first range exceeding the specification limit, and PAM4 coding is used for a second range exceeding the first range. Various embodiments are disclosed.

Abstract: High-Definition Multimedia Interface Specification, Version 1.2, supports multiple video formats. Currently the HDMI sources and sinks support multiple formats through reconfiguration of the system. The present invention describes the use of a configurable ‘n’בn’ data pixel mapping matrix for video format conversion. This mapping matrix allows the mapping of any existing video format to any other existing or future video format and allows flexibility of connectivity to any transmitter or receiver. Accordingly a more user friendly implementation that provides greater flexibility for development and use of new formats in video applications is shown.

Abstract: High Definition Multimedia Interface (HDMI) receivers use digital multiplexer at the input stage after equalization, clock and data recovery for each channel of each port. Described herein is the use of an analog multiplexer for HDMI receiver. The purpose of the analog multiplexer is to reduce the die size and power consumption by selecting the input signal from one port out of a set of input ports, right after the equalization and hence use only one block of clock and data recovery (CDR) circuits for the receiver. This sharing of one block of CDR circuits between all input ports requires the use of analog multiplexer circuits, as the signals presented to the analog multiplexer after equalization are of low signal strength and have insufficient signal-to-noise ratio to allow handling by digital multiplexer circuitry.