Abstract: A motor rotational speed limit circuit is provided. The motor rotational speed limit circuit includes a controller circuit, a detector circuit and a driver circuit. The controller circuit includes an open loop circuit and a closed loop circuit. The open loop circuit outputs an open loop rotational speed control command. The closed loop circuit outputs a closed loop rotational speed control command. The detector circuit detects a rotational speed of a motor. The driver circuit, according to the rotational speed of the motor, selects one of the open loop rotation control command and the closed loop rotation control command to output a driving signal to the motor.

Abstract: A surge suppression protection circuit is provided. The surge suppression protection circuit includes an input voltage detector circuit, a reference voltage generator circuit, an operational amplifier and a first switch component. A first terminal of the first switch component is coupled with an input voltage. A second terminal of the first switch component is grounded. A control terminal of the first switch component is connected to an output terminal of the operational amplifier. The input voltage detector circuit detects the input voltage to output a first input detected voltage. The reference voltage generator circuit outputs a first reference voltage. The operational amplifier amplifies a difference between the first input detected voltage and the first reference voltage by a gain to output an operational amplified signal. The first switch component operates according to the operational amplified signal from the operational amplifier.

Abstract: A motor driver for setting duty cycles based on a temperature is provided. The motor driver senses a temperature of an environment around a motor. The motor driver sets a duty cycle modulation value according to the sensed temperature, and modulates a preset duty cycle to form a startup duty cycle according to the duty cycle modulation value. The motor driver sets or modulates duty cycles of one or more waveforms of a startup signal to be equal to the startup duty cycle. The motor driver outputs the startup signal to the motor.

Abstract: A single-wire multi-device cascade addressing system is provided. In the multi-device cascade addressing system, a plurality of devices are arranged sequentially and connected in series with each other, and a first device and a final device among the plurality of devices are connected to a controller. The first device addresses itself according to an addressing command packet having an individual device identification address from the controller and outputs the adjusted addressing command packet to the next device. Each of the plurality of devices except for the first device addresses itself according to the addressing command packet from the previous device. Each of the plurality of devices except for the first and final devices adjusts the addressing command packet from the previous device, and outputs the adjusted addressing command packet to the next device. The final device transmits the addressing command packet from the previous device to the controller.

Abstract: A multi-output power converter having a single inductor is provided. The multi-output power converter includes a high-side switch, a low-side switch, a control circuit, a plurality of output switches and a signal duty distributing circuit. A node between a first terminal of the low-side switch and a second terminal of the high-side switch is connected to a first terminal of the inductor. A first terminal of each of the plurality of output switches is connected to a second terminal of the inductor. The signal duty distributing circuit sets duty cycles of a plurality of waveforms of a plurality of switching signals, according to output voltages respectively from second terminals of the plurality of output switches. The signal duty distributing circuit outputs the plurality of switching signals respectively to control terminals of the plurality of output switches.

Abstract: A dynamic addressing system for data transmission includes a plurality of slave devices and a master device. The master device sends a clock signal and a data signal to a first one of the plurality of slave devices. The first one of the slave devices modulates levels of the clock signal, and outputs the modulated clock signal and the data signal to a next one of the slave devices. Each of the plurality of slave devices, except for the first one and a last one of the slave devices, modulates the levels of the clock signal from a previous one of the slave devices, and outputs the modulated clock signal and the data signal to a next one of the slave devices. Each of the plurality of slave devices sets its own individual device address according to the received clock signal and the received data signal.

Abstract: A light source drive system and a failure reporting method thereof. The light source drive system includes a control circuit and a drive circuit module. The driving circuit module has at least one light source driving circuit connected with the control circuit through a fault transmission line. The light source drive circuit has a fault arbitration circuit, including: a detection circuit, a fault reporting circuit, a switch and a fault control circuit. The fault control circuit initiates the counting duty cycle when the fault condition occurs, and controls the switch to be on in the detection time and the switch to be off in the delay time. The fault control circuit controls the detection circuit to detect a first level of the fault transmission line in the duty cycle, and outputs the detection time of different durations of time according to the different types of fault conditions.

Abstract: A power converter with surge suppression is provided. The power converter includes a high-side switch, a low-side switch, a control circuit, and a discharge circuit. The control circuit connects the high-side switch and the low-side switch, and controls the operation of the high-side switch and the low-side switch. The discharge circuit receives an output voltage drop signal from an external ramp indication circuit. When the output voltage drop signal indicates that the output voltage of an output voltage signal at the output end of the power converter is dropping, the discharge circuit discharges the input voltage source. When the output voltage drop signal indicates that the output voltage has stopped dropping, the discharge circuit stops discharging the input voltage source.

Abstract: A power supply protection circuit with surge suppression and a method thereof are provided. The power supply protection circuit used in the power converter includes a discharge circuit and a surge suppression circuit. The surge detection circuit determines whether the discharge conditions are compliant based on the control signal of the low-side switch in the power converter and the output voltage. When the discharge conditions are non-compliant, the surge detection circuit outputs a discharge signal to the discharge circuit, so that the discharge circuit discharges the output voltage. When the discharge conditions are determined to be non-compliant, the surge detection circuit stops outputting the discharge signal to the discharge circuit, so that the discharge circuit stops discharging the output voltage.

Abstract: A power supply control system for a multi-phase power converter is provided. The power supply control system classifies each of a plurality of power converters into one of a plurality of power groups. The power supply control system selects one of the plurality of power converters classified in each of the plurality of power groups as a master power converter, and selects others of the plurality of power converters in each of the plurality of power groups as slave power converters. The power supply control system, according to data of the master power converter, outputs an on-time controlling signal for controlling an on-time of a high-side switch and an on-time of a low-side switch of each of the plurality of power converters, so as to control the plurality of power converters for supplying appropriate power to electronic devices.

Abstract: A motor controller with a data bit expansion mechanism is provided. The motor controller sets a plurality of pieces of target waveform characteristic data that are used respectively within a plurality of magnetic pole position time intervals to output a motor control output instruction. The motor controller, according to each of the plurality of pieces of target waveform characteristic data, generates a plurality of pieces of sub-target waveform characteristic data in a bit number expansion instruction. The plurality of pieces of sub-target waveform characteristic data are used respectively within a plurality of bit expansion time intervals. The bit number of each of the plurality of pieces of sub-target waveform characteristic data is smaller than an upper limit bit number. The motor controller generates a plurality of bit-expansion waveforms according to the bit number expansion instruction for controlling a motor.

Abstract: A power converter for dynamically adjusting voltage headroom based on a current is provided. The power converter includes a high-side switch, a low-side switch, a sensor circuit, a current source, a mirror circuit, a reference voltage adjusting circuit and a control circuit. The sensor circuit senses a current flowing through a power receiving component to output a sensed current to a first terminal of a first transistor of a current mirror. A first terminal of the second transistor of the current mirror is connected to the current source. The reference voltage adjusting circuit sets a reference voltage according to a current from a node between the first terminal of the second transistor and the current source. The control circuit controls the high-side switch and the low-side switch according to the reference voltage.

Abstract: A low-dropout regulator having an output voltage switching circuit is provided. In the low-dropout regulator, a low-dropout linear regulator circuit outputs a regulating signal according to a voltage difference between a second terminal of a transistor and a regulating threshold voltage signal or a reference voltage. In the low-dropout regulator, a switch error amplifier circuit outputs a pull-up control signal according to a voltage difference between the second terminal of the transistor and a voltage pull-up switching signal. When a voltage selector circuit of the low-dropout regulator selects the regulating signal, the transistor operates to regulate an output voltage of the low-dropout regulator according to the regulating signal. When the voltage selector circuit selects the pull-up control signal, a switch component is turned on by the pull-up control signal such that the output voltage of the low-dropout regulator is directly pulled up by an input voltage.

Abstract: A power converter having a spectrum spreading control mechanism is provided. In the power converter, a buffer circuit, according to a plurality of energy upper limit values respectively of a plurality of frequency bands falling within a switching frequency range, determines a plurality of buffering ratios corresponding respectively to the plurality of frequency bands. In the power converter, the buffer circuit buffers a voltage signal from an inductor based on one of the plurality of buffering ratios that corresponds to one of the plurality of frequency bands within which a switching frequency of the high-side switch and the low-side switch currently falls. In the power converter, an on-time determining circuit determines an on-time of the high-side switch and an on-time of the low-side switch, according to the buffered voltage signal.

Abstract: A power converter having a stable output voltage is provided. The power converter includes a high-side switch, a low-side switch, an error amplifier, a low-side feedback circuit, a pulse wave signal generator circuit, a control circuit and a driver circuit. The low-side feedback circuit outputs a blank clock signal according to a voltage of a second end of the low-side switch, a low-side drive signal of a control end of the low-side switch and an error amplified signal from the error amplifier. The pulse wave signal generator circuit sets a frequency of a clock signal according to the blank clock signal. The control circuit outputs a control signal according to the clock signal. The driver circuit, according to the control signal, outputs a high-side drive signal to a control end of the high-side switch and outputs the low-side drive signal to the control end of the low-side switch.

Abstract: A motor driver for starting up a motor having any resistance is provided. The motor driver outputs a motor startup signal to the motor according to an initial startup duty cycle, senses a current value of a current signal of the motor multiple times, compares the current value of the motor that is sensed for multiple times with a reference current value and accordingly sets a plurality of pulse waves of a pulse width modulation signal. Then, the motor driver detects duty cycles of the pulse waves of the pulse width modulation signal as startup detection duty cycles. Then, the motor driver outputs a motor startup signal to the motor according to the startup detection duty cycles.

Abstract: A motor rotational speed control system and method having a duty cycle variable modulation mechanism is provided. The motor rotational speed control system is performed by the motor rotational speed control system including a motor rotational speed detector and a motor driver. When a rotational speed of a motor detected by the motor rotational speed detector is larger than or equal to a set rotational speed, the motor driver modulates duty cycles of a plurality of waveforms of an on-time signal, and modulates a duty cycle difference between the duty cycle of each of the plurality of waveforms and the duty cycle of a previous one or every other one of the plurality of waveforms in the on-time signal. The motor driver, according to the on-time signal, drives the motor such that the rotational speed of the motor is limited to be smaller than the set rotational speed.

Abstract: A positive hysteresis elimination comparison circuit and a motor driver having a positive hysteresis elimination comparison circuit are provided. The motor driver includes a comparator and a hysteresis switching circuit. The comparator compares a voltage of a first voltage signal received by a first input terminal of the comparator with a voltage of a second voltage signal received by a second input terminal of the comparator to output a comparing signal within a comparison time. When the voltage of the first voltage signal is lower than the voltage of the second voltage signal, the comparison time is delayed. When the voltage of the first voltage signal is higher than the voltage of the second voltage signal and a positive hysteresis elimination signal is received by a first control terminal of the comparator, the comparison time is not delayed.

Abstract: An adaptive voltage modulation circuit is provided. The adaptive voltage modulation circuit includes a plurality of driver circuits and a voltage control circuit. A first one of the driver circuits outputs a feedback signal to a next one of the driver circuits according to data of a load connected thereto. Each of the driver circuits, except for the first one and a last one of the driver circuits, according to the data of the load connected thereto and the feedback signal from a previous one of the driver circuits, outputs a next feedback signal to a next one of the driver circuits. The last one of the driver circuits, according to the data of the load connected thereto and the feedback signal from a previous one of the driver circuits, instructs the voltage control circuit to supply a common modulation power signal to each of the loads.

Abstract: A power converter having a multi-mode switching mechanism is provided. The power converter includes a first switch, a second switch, a low-side switch, an output calculating circuit and a control circuit. A first terminal of the first switch is connected to a first terminal of an inductor. A second terminal of the inductor is connected to an input power source. A first terminal of the second switch is connected to a second terminal of the first switch. A second terminal of the second switch is connected to the output calculating circuit. A first terminal of the low-side switch is connected to the first terminal of the first switch. A control circuit is connected to a control terminal of the first switch, a control terminal of the second switch, a control terminal of the low-side switch and the output calculating circuit.