Patents Assigned to Anpec Electronics Corporation
  • Patent number: 10499474
    Abstract: A driver circuit and a driving method with low inrush current are provided. The driving method includes steps of: supplying a charging current smaller than a high inrush current; outputting a pulse signal from a pulse generating circuit; enabling a light driving circuit to receive the charging current by the pulse signal and allowing the charging current to flow to an storage capacitor; turning on a switch component and a light-emitting assembly by the pulse signal; supplying an auxiliary current smaller than the high inrush current; enabling the light driving circuit to receive the auxiliary current and allowing auxiliary current to flow sequentially to the switch component and the light-emitting assembly; and emitting light by the light-emitting assembly with the discharging current of the storage capacitor and the auxiliary current of input power source.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: December 3, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chih-Ning Chen, Chih-Heng Su, Hung-Wen Lu
  • Patent number: 10495096
    Abstract: A heat dissipation system includes a control module, a first fan module and a second fan module. The first fan module is electrically connected to the control module to provide a speed signal to the control module. The second fan module is electrically connected to the control module and the first fan module. The control module provides at least one control signal to control the rotation of the first fan module and the second fan module respectively. The first fan module transmits a first trigger signal to the second fan module, and the second fan module starts to rotate or stops rotating together with the first fan module according to the first trigger signal.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: December 3, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Kun-Min Chen, Ching-Feng Lai, Chien-Sheng Wang
  • Patent number: 10498237
    Abstract: A multi-phase DC-DC power converter includes an error amplifier, a comparator, a phase selection circuit, a plurality of phase circuits and a PFM/PWM logic control circuit. The plurality of phase circuits are each associated with a phase of the multi-phase DC-DC power converter, each including a turn-on clock generation circuit, a first switching transistor, a second switching transistor, an output inductor, a zero-crossing detection circuit, and a control logic. The PFM/PWM logic control circuit is configured to output, in response to a PFM control signal and a control signal associated with switch signals, a first PFM control signal and a second PFM control signal to a first phase circuit and a second phase circuit of the plurality of phase circuits. The PFM/PWM logic control circuit enters a first phase, a second phase, and a third phase under a light load condition or a no load condition.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: December 3, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Hsin-Tai Lin, Tzu-Yang Yen
  • Patent number: 10498281
    Abstract: A motor control system includes a motor, a driving module and a control module. A first coil is electrically connected to a first node where a first control signal is provided, a second coil is electrically connected to a second node where a second control signal is provided, and a third coil is electrically connected to a third node where a third control signal is provided. An constant value of the first control signal is not zero, and a lower signal voltage limit of the first control signal is larger than or equal to zero.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: December 3, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Ming-Jung Tsai, Li-Wei Chen
  • Patent number: 10454461
    Abstract: A frequency compensation circuit includes a compensation circuit and a calculation circuit. The compensation circuit controls the calculation circuit to generate a ramp voltage when the voltage at a node between an upper-side switch and a lower-side switch of the DC voltage converter is larger than an input voltage of the DC voltage converter. The calculation circuit generates a control signal at low level when the ramp voltage is smaller than the output voltage of the DC voltage converter so that the frequency compensation circuit generates the constant on-time signal at high level. The calculation generates the control signal at high level when the ramp voltage is larger than or equal to the output voltage of the DC voltage converter so that the frequency compensation circuit generates the constant on-time signal at low level.
    Type: Grant
    Filed: August 16, 2018
    Date of Patent: October 22, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Tzu-Yang Yen, Chih-Yuan Chen
  • Patent number: 10446708
    Abstract: An optocoupler device for receiving a load voltage larger than or equal to 5 KV includes a carrier, a supporting frame connected to the carrier, a light emitter and a light receiver spacedly mounted on the carrier, an electrical isolator at least partially disposed on the supporting frame, a translucent encapsulate, and an opaque encapsulate. The electrical isolator is translucent and has a dielectric strength larger than or equal to 50 KV/mm. A shortest light transmitting path between the light emitter and the light receiver passes through the electrical isolator. The supporting frame, the light emitter, the light receiver, and at least part of the electrical isolator are embedded in the translucent encapsulate, and the translucent encapsulate is embedded in the opaque encapsulate.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: October 15, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chien-Chung Hsiao, Chih-Cheng Chien
  • Patent number: 10439524
    Abstract: A motor driving circuit includes a Hall sensor, an offset detecting circuit, a driving circuit and a back EMF zero point detector. The Hall sensor generates a Hall signal group, the offset detecting circuit detects the first phase changing point of the Hall signal group, and the driving circuit generates the initial phase changing signal in the pre-operation mode according to the Hall signal group. In the correction mode, the driving circuit stops outputting the initial phase changing signal, the back EMF zero detector detects the back EMF zero point, and outputs the back EMF zero point signal. The offset detecting circuit detects a phase difference between the first phase changing point and back EMF zero point, and determines a difference value between the phase difference and a predetermined phase difference. Then, the phase of the Hall signal group is adjusted according to the difference value.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: October 8, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chia-Tai Yang, Kun-Min Chen
  • Patent number: 10439076
    Abstract: An optical package structure includes a first conductive frame, a second conductive frame, a light receiver, and a light-permeable package compound. The first and second conductive frames are arranged apart from each other and have a light entrance there-between. The light receiver includes a light receiving region and two soldering portions arranged on a surface thereof. The two soldering portions are respectively arranged at two opposite sides of the light receiving region, and are respectively soldered onto the first and second conductive frames, such that the light receiving region faces the light entrance. At least part of the first conductive frame, at least part of the second conductive frame, and the light receiver are embedded in the light-permeable package compound. The light receiver is configured to receive a light signal traveling through the light-permeable package compound and the light entrance.
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: October 8, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chih-Cheng Chien, Jane-Wang Lai, Chien-Chung Hsiao
  • Patent number: 10418352
    Abstract: An optical package structure of a mobile communication device includes a board, electrodes formed on the board, a light emitter and an IC chip both disposed on the board, and a light permeable package body encapsulating the light emitter and the IC chip. The electrodes are respectively arranged on a lower edge portion and two lateral edge portions of the board, and the number of the electrodes on the lower edge portion is larger than that on any of the two lateral edge portions. The light emitter is electrically coupled to at least one of the electrodes. The IC chip includes a light sensor corresponding in position to the light emitter and connecting pads electrically coupled to the electrodes. A distance from the light sensor to the upper edge portion is less than that to the lower edge portion, and is equal to or less than 250 ?m.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: September 17, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chih-Cheng Chien, Chien-Chung Hsiao
  • Patent number: 10412813
    Abstract: An ambient light sensor is provided, which includes a photoelectric component, a variable capacitor, an operational amplifier, a comparator, a pulse generator circuit and a pulse accumulator circuit. The photoelectric component converts light energy into a photocurrent. The variable capacitor is connected between a first input terminal and an output terminal of the operational amplifier. A capacitance of the variable capacitor is adjusted according to the photocurrent. The operational amplifier outputs an amplified error signal based on a difference between an input voltage at its first input terminal and a reference voltage at its second input terminal. The comparator compares the amplified error signal with the reference voltage to output a comparison signal. The pulse generator circuit outputs a pulse signal based on the comparison signal. The accumulator circuit accumulates the number of counts that the input voltage is increased to a voltage larger than the reference voltage.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: September 10, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chih-Ning Chen, Chih-Heng Su
  • Patent number: 10382026
    Abstract: A phase shift control circuit for a multi-channel system including a pulse control circuit and a current matching circuit is provided. The pulse control circuit includes first to third transistors, a front operational amplifier, comparers, a current mirror circuit, clock switch circuits and pulse generating circuits. The front operational amplifier has two input terminals connected to a voltage divider circuit and an output terminal of the first transistor respectively, and an output terminal connected to control terminals of all the transistors. One input terminal of the comparer is connected to an output terminal of the third transistor, and another input terminal of the comparer is connected to the output terminal of the first transistor or a reference voltage source. The pulse generators are connected to the comparers and the clock switch circuits respectively. The current mirror circuit is connected to the current matching circuit.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: August 13, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Fu-Chuan Chen
  • Patent number: 10381820
    Abstract: An undervoltage protection circuit and an overvoltage protection circuit include a first comparator and a second comparator. The first comparator has a first input terminal, a second input terminal, and a first output terminal. The second comparator has a third input terminal, a fourth input terminal, and a second output terminal. The third input terminal receives a reference voltage and the fourth input terminal receives a first feedback voltage. The first and the second output terminals are coupled with a logic device. The first feedback voltage is converted to a second feedback voltage by the delay circuit and the voltage level shifter. The first comparator outputs a detection enabling voltage for undervoltage/overvoltage detection when the first feedback voltage crosses the second feedback voltage. The logic device outputs a protection voltage level undervoltage/overvoltage protection when the first feedback voltage crosses the reference voltage.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: August 13, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chih-Heng Su, Yang-Fan Su
  • Patent number: 10348228
    Abstract: A motor driving circuit includes a Hall sensor, a driving circuit, a phase adjuster, and a phase current zero point detector. The Hall sensor detects the rotor position of the motor and generates the Hall signal group. The driving circuit generates the initial phase changing signal according to the Hall signal group. The phase current zero point detector receives and detects the phase current zero point of the phase current signal group, and generates and outputs the phase current zero point signal. The phase adjuster determines a phase difference between the phase current zero point and the intermediate point between the first phase changing point and the second phase changing point, and adjusts the initial phase changing signal according to the phase difference to generate and output the adjusted phase changing signal to drive the motor.
    Type: Grant
    Filed: August 16, 2018
    Date of Patent: July 9, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chia-Tai Yang, Kun-Min Chen
  • Patent number: 10340924
    Abstract: A digital phase-locked loop with an automatic calibration function and an automatic calibration method thereof are provided. The digital phase-locked loop includes a frequency and phase detector, a calibration circuit, a frequency and phase locked circuit, and an oscillator circuit. The frequency and phase locked circuit outputs an initial control signal. The calibration circuit calibrates an initial frequency and outputs an initial calibration signal having a calibrated initial frequency when determining that the initial frequency does not fall within an allowable error calibration range. The frequency and phase locked circuit locks the calibrated initial frequency when determining that the calibrated initial frequency falls within a locked frequency range. The oscillator circuit outputs an oscillator signal according to the initial calibration signal and the initial control signal.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: July 2, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Jing-Min Chen
  • Patent number: 10340914
    Abstract: A power converting device and a method thereof are provided. The power converting device includes a filter circuit, a zero-crossing comparison circuit, a counting circuit, a logic circuit, an oscillation circuit, and a control circuit. The zero-crossing comparison circuit outputs a zero-crossing signal when an inductor current is equal to a zero current. The counting circuit counts a time interval between two consecutive time points at which the inductor currents are equal to the zero current in a low power mode. When the logic circuit determines that the time interval is greater than a first time threshold, the control circuit transmits a first oscillating signal to the filter circuit from the oscillation circuit; otherwise, it outputs a second oscillating signal; it outputs a pulse-skipping mode signal when the interval time is less than a second time threshold.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: July 2, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Tse-Hsu Wu, Yun-Chiang Chang, Fu-Chuan Chen
  • Patent number: 10338615
    Abstract: A current balance circuit is used in a multiphase converter, and the multiphase converter includes power stage circuits, the current balance circuit and a control circuit. The current balance circuit includes detection units, a calculation circuit and error amplifiers. Detection units obtain the output power information of their corresponding power stage circuits. After each error amplifier compares the obtained output power information with the average of all output power information, it amplifies differences between the output power information and the average of all output power information and converts the amplified differences to current information, such that the control circuit adjusts currents provided by the power stage circuits according to the current information from the error amplifiers to balance the currents provided by the power stage circuits.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: July 2, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chih-Yuan Chen, Tzu-Yang Yen
  • Patent number: 10334671
    Abstract: A backlight device and a dimming control method thereof are provided. The method includes the following steps: supplying power to a plurality of light strips and a plurality of first switch components; storing an initial pulse signal in a pulse storage circuit; determining whether or not a frequency of the initial pulse signal is smaller than a frequency threshold by a pulse modulation control circuit, and if yes, outputting a pulse width modulation control signal and a voltage adjusting control signal; adjusting a pulse width of the initial pulse signal according to the pulse width modulation control signal to output a pulse width modulation signal to each of the first switch components by a pulse generator circuit; and outputting a voltage adjusting signal to each of the first switch components according to an adjustment ratio of the initial pulse signal to the pulse width modulation signal.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: June 25, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Wei-Chieh Hsueh
  • Patent number: 10333438
    Abstract: The present disclosure provides a motor driving circuit, which includes a position detecting circuit, a drive processing circuit, an adjusting voltage source, a parameter reading unit and a timing unit. The timing unit generates a timing signal, and the parameter reading unit processes the timing signal to obtain a consecutive first time interval and a second time interval. The parameter reading unit reads a first functional parameter voltage of a functional parameter pin in the first time interval and generates first functional parameter data to be written into a first register, and reads a second functional parameter voltage of a functional parameter pin in the second time interval and generates second functional parameter data to be written into a second register. The drive processing circuit drives a motor according to the first functional parameter data and the second functional parameter data.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: June 25, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Kun-Min Chen, Ching-Feng Lai
  • Patent number: 10319289
    Abstract: A dimming signal arranging method used for a light emitting diode display device is provided in the present disclosure. The dimming signal arranging method used for a light emitting diode display device includes the steps: determining whether a total number of dimming unit signals of a dimming signal is greater than a number of frames of a working interval; averagely arranging a first group of the dimming unit signals in at least one frame of the frame groups that is not a predetermined frame of each frame group; arranging a second group of the dimming unit group in at least one predetermined frame of the frame groups; and providing a dimming signal.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: June 11, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Che-Chang Chang
  • Patent number: 10314131
    Abstract: The present disclosure provides an LED driver with brightness control and a driving method thereof, which adjust a first rate of a first current mirror, a second rate of a second current mirror, and a reference current of a current source according to the brightness to be presented (related to image brightness information) to adaptively adjust an LED current flowing through an LED string, thereby reducing the loss of the LED current during operation over an operating current range. Besides, the LED driver with brightness control and the driving method thereof do not require that an operator adjusts the variation of the LED current in different operating current ranges in advance, thereby reducing the test time and cost and avoiding the operator from deciding a wrong adjustment amount.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: June 4, 2019
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Wen-Yen Chen, Ming-Hung Chang