Patents Assigned to Aoi Electronics Co., Ltd.
  • Patent number: 11521948
    Abstract: A method of manufacturing a semiconductor device, includes: preparing a support substrate having a peeling layer formed on a main surface side; partially forming a wiring layer above the peeling layer; arranging a semiconductor chip on the support substrate so that a pad of the semiconductor chip is electrically connected to the wiring layer; forming an encapsulating layer that encapsulates at least a part of the wiring layer and the semiconductor chip and is in contact with the peeling layer or a layer above the peeling layer so as to form an intermediate laminated body including the semiconductor chip, the wiring layer, and the encapsulating layer on the support substrate; cutting a peripheral portion of the support substrate after forming the intermediate laminated body; and mechanically peeling the intermediate laminated body from the support substrate with the peripheral portion cut away, with the peeling layer being as a boundary.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: December 6, 2022
    Assignee: AOI Electronics Co., Ltd.
    Inventor: Ichiro Kono
  • Patent number: 11328998
    Abstract: A semiconductor device includes: a first semiconductor element having a first electrode on a main surface side thereof and a second electrode on a back surface side thereof; a base material provided with a connection conductor connected to the first electrode; a sealing resin provided on the base material to seal the first semiconductor element; and a first via provided in the sealing resin and electrically connected to the second electrode of the first semiconductor element.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: May 10, 2022
    Assignee: AOI Electronics Co., Ltd.
    Inventor: Shinji Wakisaka
  • Patent number: 11075180
    Abstract: A semiconductor device includes a semiconductor element having a plated portion on a part of a main surface and a protective member that seals surfaces of the semiconductor element except for the main surface, wherein the plated portion is electrically connected to a circuit in the semiconductor element.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: July 27, 2021
    Assignee: AOI Electronics Co., Ltd.
    Inventor: Katsuhiro Takao
  • Patent number: 10953663
    Abstract: A thermal head includes: an underglaze layer provided on an insulating substrate; an electrode provided on the underglaze layer; a heat generator provided on the electrode; a first protective layer containing a glass material and covering at least the heat generator; and a second protective layer provided on the first protective layer, having a melting point higher than that of the first protective layer, and made of a material whose thermal expansion coefficient at a temperature of 1000° C. or lower is substantially constant.
    Type: Grant
    Filed: July 12, 2018
    Date of Patent: March 23, 2021
    Assignee: AOI Electronics Co., Ltd.
    Inventors: Michihiro Miyashige, Noriaki Onishi, Norio Yamaji
  • Patent number: 10854560
    Abstract: A semiconductor device includes: an island that is formed by a metallic layer including a single metallic layer or a plurality of different metallic layers; a semiconductor chip provided upon an upper surface of the island, and having a pair of side portions mutually opposing each other; a plurality of signal terminals disposed at an external periphery of at least the pair of side portions of the semiconductor chip, and formed by the metallic layer; a grounding terminal disposed at an external periphery of the plurality of signal terminals, and formed by the metallic layer; electrically conductive connection members that are connected between each of a plurality of electrodes of the semiconductor chip and each of the plurality of signal terminals; sealing resin that seals the island, the semiconductor chip, the electrically conductive connection members, the plurality of signal terminals, and the grounding terminal, so that a lower surface of the island, lower surfaces of the plurality of signal terminals, an
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: December 1, 2020
    Assignees: AOI Electronics Co., Ltd., Mitsubishi Electric Corporation
    Inventors: Shuichi Sawamoto, Koji Iwabu, Katsuhiro Takao, Akihito Hirai, Joichi Saito
  • Patent number: 10854557
    Abstract: A semiconductor device includes: an island that is formed by a metallic layer including a single metallic layer or a plurality of different metallic layers; a semiconductor chip provided upon an upper surface of the island, and having a pair of side portions mutually opposing each other; a plurality of signal terminals disposed at an external periphery of at least the pair of side portions of the semiconductor chip, and formed by the metallic layer; a grounding terminal disposed at an external periphery of the plurality of signal terminals, and formed by the metallic layer; electrically conductive connection members that are connected between each of a plurality of electrodes of the semiconductor chip and each of the plurality of signal terminals; sealing resin that seals the island, the semiconductor chip, the electrically conductive connection members, the plurality of signal terminals, and the grounding terminal, so that a lower surface of the island, lower surfaces of the plurality of signal terminals, an
    Type: Grant
    Filed: May 19, 2016
    Date of Patent: December 1, 2020
    Assignees: AOI Electronics Co., Ltd., Mitsubishi Electric Corporation
    Inventors: Shuichi Sawamoto, Koji Iwabu, Katsuhiro Takao, Akihito Hirai, Joichi Saito
  • Publication number: 20170336263
    Abstract: Reflected light detecting device and method with surface reflected light components collectively be extracted/removed when detecting reflected light arising in casting light onto target-object range having non-planar surface.
    Type: Application
    Filed: May 17, 2017
    Publication date: November 23, 2017
    Applicants: AOI ELECTRONICS CO., Ltd., NATIONAL UNIVERSITY CORPORATION KAGAWA UNIVERSITY
    Inventors: Hiroki HAYASHI, Ichiro ISHIMARU
  • Patent number: 9812423
    Abstract: A semiconductor device includes: a connection terminal; a semiconductor chip having an electrode pad on one surface; a wire that connects the connection terminal and the electrode pad of the semiconductor chip; and transparent resin that covers the one surface of the semiconductor chip, and that seals the connection terminal and the wire, wherein: the wire includes a first bonded portion that is joined to the electrode pad, a second bonded portion that is joined to the connection terminal, and a loop portion that is formed so as to be continuous with the first bonded portion and has a turned back portion on a side opposite to the second bonded portion; and predetermined clearances are provided between the loop portion and the first bonded portion, and between the loop portion and other portions of the wire.
    Type: Grant
    Filed: November 19, 2014
    Date of Patent: November 7, 2017
    Assignee: AOI Electronics Co., Ltd.
    Inventor: Naoki Fukue
  • Patent number: 9640478
    Abstract: A semiconductor device includes a semiconductor substrate on which a structure portion is provided except a peripheral portion thereof, and has a laminated structure including low dielectric films and wiring lines, the low dielectric films having a relative dielectric constant of 3.0 or lower and a glass transition temperature of 400° C. or higher. An insulating film is formed on the structure portion. A connection pad portion is arranged on the insulating film and connected to an uppermost wiring line of the laminated structure portion. A bump electrode is provided on the connection pad portion. A sealing film made of an organic resin is provided on a part of the insulating film which surrounds the bump electrode. Side surfaces of the laminated structure portion are covered with the insulating film and/or the sealing film.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: May 2, 2017
    Assignee: AOI ELECTRONICS CO., LTD.
    Inventors: Aiko Mizusawa, Osamu Okada, Takeshi Wakabayashi, Ichiro Mihara
  • Patent number: 9607861
    Abstract: A method of manufacturing a semiconductor device, including steps of: (a) bonding a support plate to a first main face of a wafer, the first main face having an integrated circuit disposed thereon; (b) thinning the wafer by polishing or grinding a second main face after step (a), the second main face being opposite to the first main face; (c) dividing the wafer into multiple chip bodies concurrently with or after step (b); (d) bonding multiple reinforcing layers to second main faces of the respective chip bodies after step (c); and (e) removing the support plate after step (d).
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: March 28, 2017
    Assignee: AOI ELECTRONICS CO., LTD.
    Inventors: Junji Shiota, Ichiro Kono
  • Patent number: 9570407
    Abstract: A method for manufacturing a semiconductor device includes: a fixing step in which semiconductor chips are mounted on and fixed to predetermined positions on an upper surface of a single starting substrate to form individual substrates; a connection step in which electrodes of the semiconductor chips and of the starting substrate are connected by wires; a sealing step in which on the upper surface of the starting substrate, the resin is potted among the semiconductor chips to seal an entire lateral circumference of each of the semiconductor chip; a bonding step in which a single starting protective cover to form individual protective covers is bonded to a surface of the resin so as to extend the semiconductor chips; and a cutting step in which an assembly of the semiconductor devices formed by bonding the starting protective cover to the starting substrate via the resin is cut to the semiconductor devices.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: February 14, 2017
    Assignee: AOI Electronics Co., Ltd.
    Inventors: Takahiro Ebisui, Masako Furuichi, Shuji Inoue
  • Patent number: 9448102
    Abstract: A photoreception device includes: a substrate; a photoreceptor element including a photoreceptor portion upon an upper surface thereof and a lower surface thereof is mounted upon the substrate; and an insulating resin mass that contains a flat upper surface and an opening that exposes the photoreceptor portion of the photoreceptor element, that is formed upon the substrate to be thicker than thickness of the photoreceptor element, and that adheres closely against side surfaces of the photoreceptor element, the side surfaces surrounding the photoreceptor element. The insulating resin mass contains a step portion that is provided to a height between the flat upper surface thereof and the upper surface of the photoreceptor portion; and the step portion extends parallel to at least one pair of mutually opposed side surfaces of the photoreceptor element, at a periphery of the opening.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: September 20, 2016
    Assignee: AOI Electronics Co., Ltd.
    Inventor: Takahiro Ebisui
  • Patent number: 9425710
    Abstract: An electrostatic induction conversion device includes: an input-side electrostatic actuator that includes a first fixed electrode and a first movable electrode facing the first fixed electrode; and an output-side electrostatic actuator that includes a second movable electrode linked to the first movable electrode via a link mechanism member, which increases or decreases a displacement quantity representing an extent of displacement occurring at the first movable electrode, and a second fixed electrode facing the second movable electrode, wherein: a permanently charged layer is deposited on an electrode surface either on a movable electrode side or on a fixed electrode side, at the input-side electrostatic actuator and the output-side electrostatic actuator.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: August 23, 2016
    Assignees: AOI Electronics Co., Ltd., National University Corporation Shizuoka University
    Inventors: Masato Suzuki, Hiroki Hayashi, Gen Hashiguchi, Tatsuhiko Sugiyama
  • Patent number: 9425709
    Abstract: A vibration driven power generation element according to the present invention includes: a three dimensionally shaped movable comb tooth electrode comprising a plurality of comb teeth of which interiors are filled with an insulating material, and having an SiO2 layer into which alkali ions are injected provided upon its outer surface; and a fixed type comb tooth electrode provided with a plurality of comb teeth made from Si the interiors of which are doped so as to have low electrical resistance, being arranged with the three dimensionally shaped movable comb tooth electrode opposed thereto and interleaved thereinto.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: August 23, 2016
    Assignee: AOI Electronics Co., Ltd.
    Inventors: Hiroki Hayashi, Masato Suzuki, Takashi Konno
  • Patent number: 9406637
    Abstract: A semiconductor construct includes a semiconductor substrate and connection pads provided on the semiconductor substrate. Some of the connection pads are connected to a common wiring and at least one of the remaining of the connection pads are connected to a wiring. The construct also includes a first columnar electrode provided to be connected to the common wiring and a second columnar electrode provided to be connected to a connection pad portion of the wiring.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: August 2, 2016
    Assignee: AOI ELECTRONICS CO., LTD.
    Inventors: Shinji Wakisaka, Takeshi Wakabayashi
  • Patent number: 9263192
    Abstract: A method for forming an electret containing positive ions, includes: a first step of contacting water vapor including positive ions to a Si substrate to which heat is being applied, and forming an oxide layer including those ions; a second step of, along with applying an electric field that makes the side of the oxide layer that does not contact the Si substrate be the negative side, and that makes its other side be a positive side, applying heat to the Si substrate in a hydrogen atmosphere, and causing the ions in the oxide layer to shift; and a third step of contacting water vapor including a chemical substance, in an atmosphere of an inactive gas, for forming a hydrophobic chemically adsorbed monomolecular layer, and thus forming a hydrophobic membrane upon the oxide layer; wherein the second step and the third step are performed continuously within one common vessel.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: February 16, 2016
    Assignee: AOI Electronics Co., Ltd.
    Inventors: Masato Suzuki, Hiroki Hayashi
  • Publication number: 20140346923
    Abstract: An electrostatic transformer includes: a first fixed electrode; a second fixed electrode; a movable electrode displaceably supported by a flexible member within a space between the first fixed electrode and the second fixed electrode; and permanently charged films disposed on electrode surfaces of the movable electrode. And: an AC output voltage corresponding to a change in an electric charge induced at the second fixed electrode by displacing the movable electrode in response to an AC input voltage applied between the first fixed electrode and the movable electrode is extracted; and a ratio of the AC input voltage and the AC output voltage is determined based upon a ratio of an electromechanical coupling factor at an input-side electrostatic actuator, configured with the first fixed electrode and the movable electrode, and an electromechanical coupling factor at an output-side electrostatic actuator, configured with the second fixed electrode and the movable electrode.
    Type: Application
    Filed: May 21, 2014
    Publication date: November 27, 2014
    Applicant: AOI Electronics Co., Ltd.
    Inventors: Hiroki HAYASHI, Masato SUZUKI
  • Patent number: 8866296
    Abstract: A semiconductor device includes: a semiconductor chip with a plurality of electrode pads disposed at a top surface thereof; a plurality of thin film terminals set apart from one another via respective separator portions, which are located below a bottom surface of the semiconductor chip; an insulating layer disposed between the semiconductor chip and the thin-film terminals; connecting members that connect the electrode pads at the semiconductor chip with the thin-film terminals respectively and a resin layer disposed so as to cover the semiconductor chip, the plurality of thin-film terminals exposed at the semiconductor chip, the separator portions and the connecting members.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: October 21, 2014
    Assignee: AOI Electronics Co., Ltd.
    Inventors: Takashi Yamaji, Takaaki Kato
  • Patent number: 8865498
    Abstract: A method for manufacturing a three-dimensionally shaped comb-tooth electret electrode, provided with positive ions, includes: forming a three-dimensional movable comb-tooth electrode and a three-dimensional fixed comb-tooth electrode from an Si substrate; contacting a vapor including ions thereto, and forming an oxide layer including ions upon surfaces of the comb-tooth electrodes with heat applied thereto; and applying a voltage between the movable electrode and the fixed electrode with heat applied thereto, and thereby causing the ions included in the oxide layer to shift to a surface of the oxide layer; wherein, the voltage between the movable electrode and the fixed electrode is changed, so that the operation of each of the comb-teeth of the movable electrode being alternatingly pulled in against two opposed comb-teeth of the fixed electrode is repeated, and the pulling in voltage and the pulled-in state release voltage are gradually increased.
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: October 21, 2014
    Assignee: AOI Electronics Co., Ltd.
    Inventors: Masato Suzuki, Hiroki Hayashi
  • Patent number: 8780153
    Abstract: A thermal head wherein abrasion of an insulating protection film of a heating resistor formed on a partial glaze layer can be suppressed. A heating resistor is provided on the partial glaze layer provided on a ceramic substrate in the longitudinal direction, and the entire surface including the heating resistor is covered by the insulating protection film. A level difference is formed between the insulating protection film over the heating resistor and a flat portion of the insulating protection film over the area outside of the partial glaze layer. The level difference is set so that the insulating protection film on the heating resistor defines a higher portion and a platen roller can press thermal paper on the insulating protection film over the heating resistor and on the flat insulating protection film outside of the partial glaze layer. Thereby, the pressing force of the platen roller can be dispersed.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: July 15, 2014
    Assignee: AOI ELectronics Co., Ltd.
    Inventor: Norio Yamaji