Patents Assigned to AP Memory Technology Corp.
  • Publication number: 20210050410
    Abstract: A capacitor device includes: a substrate; an insulation film, disposed on the substrate; at least one capacitor unit cell, being covered by the insulation film on the substrate, the at least one capacitor unit cell having at least one first electrode and at least one second electrode disposed over the first electrode; an exposed conductive layer, disposed on the at least one capacitor unit cell and the insulation film, the exposed conductive layer having a first conductive pad formed on a first side of the exposed conductive layer and a second conductive pad formed on a second side different from the first side; wherein the first conductive pad and the second conductive pad are electrically connected to the at least one first electrodes and the at least one second electrodes of the at least one capacitor unit cell respectively.
    Type: Application
    Filed: October 30, 2020
    Publication date: February 18, 2021
    Applicants: AP Memory Technology Corp., AP Memory Technology (Hangzhou) Limited Co.
    Inventors: Masaru HARAGUCHI, Yoshitaka FUJIISHI, Wenliang CHEN
  • Publication number: 20200402903
    Abstract: A circuit assembly includes an integrated circuit (IC) die and a first capacitor die. The IC die provides an IC and includes a plurality of first conductive pads. The first capacitor die provides a plurality of capacitors, and includes a plurality of second conductive pads at the first side and a plurality of conductive vias at the second side. At least one of the second conductive pads electrically connects to the capacitors. The conductive vias is adapted to form a plurality of external signal connections of the IC die and the first capacitor die. The IC die is stacked with the first capacitor die in such a way that the first conductive pads electrically connect to the second conductive pads, and surfaces of the IC die and the first capacitor die attaching to each other are substantially of the same size.
    Type: Application
    Filed: September 2, 2020
    Publication date: December 24, 2020
    Applicant: AP Memory Technology Corp.
    Inventors: Wenliang CHEN, Jun GU, Masaru HARAGUCHI, Takashi KUBO, Chien-An YU, Chun Yi LIN
  • Publication number: 20200357709
    Abstract: A semiconductor device includes a first semiconductor portion and a second semiconductor portion. The first semiconductor portion provides a plurality of memory components, including a first substrate layer, a plurality of first interconnect conductive layers, a plurality of first conductive vias, and a plurality of first conductive contacts. The first conductive contacts electrically connect to the first conductive vias, and the first conductive contacts in combination with the first conductive vias are formed on a top first interconnect conductive layer of the first interconnect conductive layers. The second semiconductor portion provides a control circuit, including a second substrate layer and a plurality of second interconnect conductive layers.
    Type: Application
    Filed: June 11, 2020
    Publication date: November 12, 2020
    Applicant: AP Memory Technology Corp.
    Inventors: Wen Liang CHEN, Lin MA, Chien-An YU, Chun Yi LIN
  • Patent number: 10811402
    Abstract: The invention provides a memory device and microelectronic package having the same. The microelectronic package comprises at least one memory device which is adapted to be stacked vertically with one another, and a processing device stacked vertically and adjacently with the at least one memory device and electrically connected to the conductive interconnects. Each of the memory devices comprises a substrate and a plurality of memory units. The substrate presents a front surface and a back surface. The memory units are formed on the front surface, each of which comprises a plurality of memory cells and a plurality of conductive interconnects electrically connected to the memory cells. In each of the memory units, the conductive interconnects contribute to a plurality of signal channels each of which is dedicated to transmit signals from the processing device to one of the memory units and vice versa.
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: October 20, 2020
    Assignee: AP Memory Technology Corp.
    Inventors: Wenliang Chen, Lin Ma, Alessandro Minzoni