Abstract: A differential amplifier stage includes one active load circuit connected to a pair of cross-coupled transistors that produce a differential signal. The active load circuit controls the rise time of the differential signal. The differential amplifier stage also includes another active load circuit connected to the pair of cross-coupled transistors. The second active load circuit controls the fall time of the differential signal.

Abstract: An apparatus includes an integrated circuit that includes low side power supply circuitry that provides an output voltage for H-bridge circuitry. The low side power supply circuitry includes one transistor that provides one current to the output of the low side power supply circuitry in response to the output voltage of the low side power supply circuitry dropping below a quiescent level. The low side power supply circuitry also includes a second transistor that controls the conduction state of a third transistor, based at least in part, upon the first transistor providing the first current to the output of the low side power supply circuitry. The third transistor provides a second current to the output of the low side power supply circuitry.

Abstract: An amplifier circuit that includes an amplifier stage and an output stage, and local feedback between these stages to drive a biasing string associated with the amplifier stage using the potential at the output stage. In one embodiment, the local feedback line is coupled between the output stage and the biasing string to remove the loading effect of the biasing string on the amplifier stage. In another embodiment, the local feedback line is coupled between the switches of the amplifier stage and the switches of the output stage to bias the amplifier stage using the output stage.

Abstract: An improved power operational amplifier device is disclosed which provides a floating buffer having a first and second RC time constant for controlling a first bank of MOSFET transistors in an output portion of the device. In addition, the power operational amplifier includes a fixed buffer having a third RC time constant for controlling a second bank of MOSFET transistors located in an output portion of the device. A current limit section is coupled to both the floating buffer and the fixed buffer, and, in addition, the current limit section of the improved power operational amplifier has an oscillation stabilizer portion for limiting oscillations of output current during output stage current limit operation. The device also includes an output portion coupled to each of the floating buffer, the fixed buffer, and the current limit section.

Abstract: An operational amplifier input stage includes two transistors coupled as a differential amplifier to receive input signals. At least one transistor is stacked in a load circuit of each input transistor for the purpose of lowering the voltage across each transistor. In order to eliminate the effects of error currents resulting from conventional resistor self biasing of the stacked transistors, two nodes, to which the input transistors are coupled, are identified. According to a first embodiment, feedback circuits are coupled to each node and each feedback circuit maintains the coupled node at a voltage level established by the feedback apparatus of the operational amplifier. According to a second embodiment, a single feedback circuit controls the voltage at a first node and the same feedback circuit maintains the voltage level of a second node at a constant level.

Abstract: An operational amplifier input stage includes two transistors coupled as a differential amplifier to receive input signals. At least one transistor is stacked in a load circuit of each input transistor for the purpose of lowering the voltage across each transistor. In order to eliminate the effects of error currents resulting from conventional resistor self biasing of the stacked transistors, two nodes, to which the input transistors are coupled, are identified. A feedback circuit is coupled to each node and each feedback circuit maintains the coupled node at a voltage level established by the feedback apparatus of the operational amplifier. The disclosed circuit eliminates circuit drift and offset voltages resulting from changes in common mode and/or power supply voltages by eliminating the effects of resistive loading on the input stage components.

Abstract: An environmental testing facility for verifying operational conditions of electronic components at predefined temperature extremes is described. A removable multistation holder is configured to have a plurality of components coupled thereto. The multistation holder is coupled to a controllable, rotatable shaft. A hood is placed over the holder, shaft and associated apparatus and placed in contact with a base plate, so that a vacuum can be established in the resulting chamber. A sensing device permits the positioning of the individual components with respect to an interface apparatus. When the component is correctly positioned with respect to the interface apparatus, the interface apparatus is moved to engage the terminals of the components. The electrical signals can be applied to and received from the component through the interface device. After a first temperature condition is established for the multistation holder and consequently for the components coupled thereto, all of the components are tested.

Abstract: In a wide-band direct-coupled transistor amplifier, the current through the power output stage must be stabilized to prevent fluctuations in the amplifier output signal. To stabilize the output stage current, a negative feedback loop is established providing a bias control for the amplifier input stage. In the past, voltage feedback apparatus, typically including operational amplifiers, has been utilized. In the present invention, a current feedback path, which avoids the voltage level translation inherent in the prior art, is used to provide the feedback bias control for the input stage of the amplifier. A technique for the compensation of temperature drift and for voltage offset is described.

Abstract: A circuit for providing a constant current and a constant bias voltage is described. The circuit includes two paths coupled between a positive voltage supply +V.sub.S and a negative voltage supply -V.sub.S. Each path inlcudes a Zener diode and a enhancement mode field effect transistor (FET) device (the FET device being coupled in a diode configuration) which are connected in series. Each path of the circuit further includes an FET device and an associated resistor combination, coupled in series with the Zener diode and the diode-coupled FET device. The FET device and the associated resistor function as a current source component. A gate terminal of each FET device of the current source component is coupled across the Zener diode and the diode-coupled FET device of the other circuit path.