Abstract: The invention is directed towards methods and apparatuses for archiving and unarchiving objects. Some embodiments of the invention archive and unarchive objects that have global and user settings in multi-user environments. To archive objects, these embodiments identify which object settings are global settings and which settings are user settings. They store the global settings in an archive, and then store the user settings in another archive. To unarchive each object, some embodiments identify the object's settings in one or both archives. These embodiments instantiate the object, and retrieve its settings from the data archives and use the retrieved settings to define the values of the settings of the instantiated object. Some embodiments use key-value coding techniques to retrieve values and load values in an object. Key-value coding allows an archiving or unarchiving process to retrieve and load setting values for an object by using the setting names.

Abstract: The invention pertains to electronic devices capable of dynamically changing their ornamental or decorative appearance, i.e., the outer appearance as seen by a user. The electronic devices generally include an illuminable housing. The illuminable housing, which includes at least one wall configured for the passage of light, is configured to enclose, cover and protect a light arrangement as well as functional components of the electronic device. The light arrangement, which generally includes one or more light sources, is configured to produce light for transmission through the light passing wall(s) of the illuminable housing. The transmitted light illuminates the wall(s) thus giving the wall a new appearance. That is, the transmitted light effectively alters the ornamental or decorative appearance of the electronic device. In most cases, the light is controlled so as to produce a light effect having specific characteristics or attributes.

Abstract: Methods and apparatuses for dispatching instructions executed by at least one functional unit of a data processor, each one of the instructions having a corresponding priority number, in a data processing system having at least one host processor with host processor cache and host memory are described herein. In one aspect of the invention, an exemplary method includes receiving a next instruction from an instruction stream, examining a current instruction group to determine if the current instruction group is completed, adding the next instruction to the current instruction group if the current instruction group is not completed, and dispatching the current instruction group if the current instruction group is completed.

Abstract: The present invention provides an apparatus and methods for the functionality of an integrated circuit. An exemplary embodiment according to an aspect of the present invention includes a ball grid array having open spaces therein. Within the open spaces, pairs of opposite polarity vias are clustered to minimize current path inductance by exploiting mutual inductance between vias of opposite current flow. In an illustrative embodiment, capacitors are coupled to the vias to further reduce current path inductance.

Abstract: The present invention provides a method for generating random jitter test patterns by generating a sequence of maximum-size asynchronous packets according to the P1394b standard and transmitting the sequence to the device under test. The present invention provides a method for generating jitter test patterns by disabling the transmitter data scrambler of the second device; clearing the port_error register of the device under test; and sending a test pattern to said device under test. The present invention provides for a method for generating supply noise test patterns comprising: transmitting a test pattern to the DUT comprising a maximum length asynchronous packet containing alternate 0016 and FF16 bytes.

Abstract: A user interface and methods for using a user interface for controlling processing of time-based media files. In one exemplary method, a graphical representation of a time line for a time-based media is displayed along with a graphical representation of a current time along the graphical representation of the time line. A start graphical indicator and a stop graphical indicator is also displayed along the graphical representation of the time line. A portion of the time-based media may be selected for presentation by dragging or positioning at least one of the start graphical indicator and the stop graphical indicator along the graphical representation of the time line. In another aspect of the invention, an exemplary method allows for the adaptive control of a portion of the interface which indicates time relating to a time-based media. An input speed is determined where this input is to change the portion and the rate at which the change to this portion occurs is dependent upon the input speed.

Abstract: A computer (10) having a monitor housing (12) within which is affixed a logic module (24) having thereon a processor (36), a memory module (38), an internal power connector (39), a fixed disk drive (40), an internal data connector (41), and an external connector panel (46) all generally housed within a sheet metal housing (42) having therein a plurality of perforations (44) for allowing air from a fan assembly (30) to pass therethrough. A power supply (28) and monitor screen (14) are provided in the monitor housing (12) such that when the logic module (24) is mounted and electrically connected within the monitor housing (12) a generally complete computer (10) unit is provided. An auxiliary drive (16) is optionally provided and affixed to the logic module (24) such that the auxiliary drive (16) is externally accessible when the logic module (24) is affixed within the monitor housing (12).

Abstract: A system and method of rendering overlapping layers in a computer display, such as a windowing system, employs front-to-back assembly of the displayed image. An arbitrary number of overlapping elements, such as windows, can be presented, without requiring temporary storage space or additional off-screen buffers. The front-to-back assembly technique minimizes the number of memory transfers performed in connection with rendering an image, and avoids unnecessary reading and processing of pixels that will not contribute to the final image. Special effects such as semi-transparency, shadows, and irregular shapes can be accommodated and processed in an efficient manner.

Abstract: A system and method for performing convolution in a single channel of a vector processing computer system takes advantage of the parallel computing capability of the vector processing system and the distributed properties of the discrete-time convolution sum by performing convolution on portions of an overall data stream, or data chunks, simultaneously. Partial solution are thereby obtained and superimposed to achieve an overall solution data stream. To simplify the convolution sum and eliminate the need for calculating products, a specialized data signal or vector containing a series of ones may be used in the convolution operation.

Abstract: A first command is retrieved from a script containing one or more commands written for a first color space. The first command is associated with zero or more input buffers and zero or more output buffers. The first command has zero or more parameters. A behavior of the first command in the first color space and in a second color space is determined. The behavior comprises one of unique behavior, transparent behavior, and different behavior. The first command has the unique behavior when the first command only operates in the first color space. The first command has the transparent behavior when the first command generates similar results in the first color space and in the second color space. The first command has the different behavior when the first command generates different results in the first color space and in the second color space. Using the behavior of the first command, an operation associated with the first command is processed.

Abstract: One embodiment of the present invention provides a system for implementing a sleep proxy. The system starts by receiving a request at the sleep proxy for information pertaining to a service provided by a device. In response to this request, the system determines if the device is a member of a list of devices for which the sleep proxy takes action. If so, the system determines if the sleep proxy can answer the request. If so, the sleep proxy sends a response to the request on behalf of the device. In a variation on this embodiment, if the system cannot answer the request on behalf of the device, the system sends a wakeup packet to the device, wherein the wakeup packet causes the device to exit a power-saving mode so that the device can respond to the request directly.

Abstract: Techniques for reducing power consumption in pipelined processors are described. As a method, one embodiment of the present invention reduces power requirements in a piplelined processor by evaluating instructions to be executed to determine the operation type of the instructions, producing activity indicators based upon the operation types of the instructions, and controlling the supply of current to each of the stages such that only selected stages draw current from a power supply.

Abstract: A cubical computer housing assembly comprises first and second ends and four sides, which define an interior compartment for housing the various computer components. The first and second ends are rigidly connected to one another and are slidingly detachable from four sides of the assembly. The interior compartment comprises three parallelepiped portions, one for accommodating a plurality of circuit boards, one for accommodating a heat sink and hard disk drive, and one for accommodating other memory device such as a CD ROM or DVD player. A hard disk drive is slidingly mounted in a frame which is rigidly mounted relative to the first and second ends. A hinged door on which is mounted a printed circuit board can be moved to an open position to provide access to the disk drive for removal and replacement of same.

Abstract: The present invention discloses a method for quickly and easily authenticating large computer program. The system operates by first sealing the computer program with digital signature in an incremental manner. Specifically, the computer program is divided into a set of pages and a hash value is calculated for each page. The set of hash values is formed into a hash value array and then the hash value array is then sealed with a digital signature. The computer program is then distributed along with the hash value array and the digital signature. To authenticate the computer program, a recipient first verifies the authenticity of the hash value array with the digital signature and a public key. Once the hash value array has been authenticated, the recipient can then verify the authenticity of each page of the computer program by calculating a hash of a page to be loaded and then comparing with an associated hash value in the authenticated hash value array.

Abstract: A hierarchical movie is provided. A hierarchical movie is a movie that contains one or more embedded movies. Embedded movies may themselves contain embedded movies. Each movie contains zero or more media sequences. Within a hierarchical movie, media sequences that should be edited together may be grouped together using embedded movies. The media sequences of a hierarchical movie may be sequenced during playback based on a different time coordinate system than the time coordinate system that governs any embedded movies. This allows a movie to contain both time-based and time-independent media sequences. Also, the relative timing of events in the movie may vary from performance to performance. The hierarchical movie structure allows movies to be used as user interface controls, and even as field-sensitive databases.

Abstract: Methods and apparatus for spreading and concentrating information to constant-weight encode data words on a parallel data line bus while allowing communication of information across sub-word paths. In one embodiment, data transfer rates previously obtained only with differential architectures are achieved by only a small increase in line count above single ended architectures. For example, an 18-bit data word requires 22 encoded data lines for transmission, where previously, 16 and 32 lines would be required to transmit un-coded data with single-ended and differential architectures respectively. Constant-weight parallel encoding maintains constant current in the parallel-encoded data lines and the high and low potential driver circuits for the signal lines.

Abstract: Methods and apparatuses for managing file extensions in a processing system. An exemplary method of managing file extensions in a digital processing system involves a user interface and a plurality of files, each file having a name that comprises a filename and an extension. The method includes associating a file with an indicator which is user selectable for a single file in a plurality of files in said digital processing system and which indicates how to display an extension of the file, and assigning a value to the indicator, and displaying a displayed name of the file in the user interface in a style determined by the indicator.