Abstract: To reduce rendering time for an image to be generated, an image to be generated, such as a page of a document, is divided into non-overlapping regions. Within each region, a determination is made whether all of the data contained therein is achromatic. If so, achromatic data is rendered for a single component of a multi-component color space. Pixel values are stored in one section of a frame buffer that relates to the single component. The other components of the color space use multiple references to the pixel data stored in this one section, rather than being separately rendered.

Abstract: Dramatically lower power consumption of a video display to is achieved during standby mode. Using relatively simple sync-energy converting circuitry, the power supply can be switched on/off electronically, without the need to have the main power supply running and without an auxiliary supply. Power consumption of 0 W may thereby be achieved. In accordance with one embodiment of the invention, sync-signal energy is stored in a storage capacitor. During charging, the capacitor is decoupled from any load such that capacitor voltage will reach a peak voltage of the unloaded source signal. Charge and discharge cycles repeat continuously for so long as the power switch is turned off. This charging and discharging allows the display to be turned on using the power switch, even without the momentary presence of AC line voltage. A possible non-retriggable state is avoided using an RC time constant.

Abstract: A method and apparatus for positioning windows on a display screen in a computer environment in which a user perceives that multiple operations can be executed simultaneously. The method and apparatus for positioning windows is based upon the number of existing windows and the arrangement of previously-created windows. Preferably, a computer system incorporating the invention includes a one or more dam structures, herein called "window slots", each window slot retaining location information and indicating, either explicitly or implicitly, availability of the window slot. Window slots can be organized into a window slot structure. If a window is being opened, then a window slot is assigned to the window being opened and a window slot structure having zero or more window slots is updated. The assigning and updating is based upon the availability of a window slot and the number of in-use window slots in the window slot structure.

Abstract: A display oriented software user interface for the generation and display of a secondary display region within a primary display region of a computer controlled information management system having windows or localized sections of displayable information and icons. The secondary display region, Desk Drawer, providing advanced capabilities to the management system by generating a readily accessible region wherein icons may be placed and always accessed thereafter when the secondary display region is present. The presence of the secondary display region may be governed by a separate screen region responsive to the cursor display position.

Abstract: An arrangement for transmitting information from a first component of a computer system to a second component of the computer system including a source channel associated with the first component of the computer system; a destination channel associated with the second component of the computer system; apparatus for interconnecting the source and the destination channels; the source channel including apparatus for creating a stream of information in a prescribed format, apparatus for designating a destination channel as an address for the stream of information, and apparatus for transferring the stream of information to the apparatus for interconnecting the source and the destination channels; and the destination channel including apparatus for receiving a stream of information in the prescribed format from the apparatus for interconnecting the source and the destination channels, apparatus for receiving control signals apart from the stream of information, and apparatus for controlling the use of the stream o

Abstract: A direct memory access (DMA) controller is connected with the CPU bus of a computer system through a bus interface and also to an I/O bus, which is connectable to one or more I/O controllers. The DMA controller contains multiple channels, each corresponding to a particular I/O controller, which are coupled to both the bus interface and the I/O bus. Each of the channels contains at least one register set storing information for the transfer and a data buffer holding the data during a transfer between the I/O bus and the CPU bus.

Abstract: According to the invention, a software tool such as an authoring tool provides a mechanism for manipulating transient events within a multimedia product or other content having one or more state machines, each state machine having one or more states and one or more transitions, each transition connecting a first state with a second state, the first and second states being the same as or different from each other, each transition capable of being associated with one or more transient events and a trigger such that when said trigger occurs it initiates a transition from the transition's first state to the transition's second state, the transient events associated with the transition occurring on the computer system during the transition. The invention provides a mechanism for locating a transient event and displays a graphic reference for the located transient event so that the graphic reference can be used to manipulate the transient event.

Abstract: Computer apparatus stores a subject value and a chain of sequentially associated value handlers for the subject value. The chain includes a top value handler and a bottom value handler, each of the value handlers in the chain except the bottom value handler invoking the respective next value handler when invoked, the bottom value handler performing an operation on the subject value when invoked. The value operations can be data read operations, data write operations, etc., and the value handlers in the chain can perform data transformations and/or data redirections, transparently to its caller.

Abstract: A method in a computer system enables the translation and opening of a document which was created by an application program no longer resident in the computer system. The method begins by identifying the file format of the target document, Subsequently, all computer resident applications capable of opening the document are identified and translation paths from the document to the accessible application programs are calculated. Each of the available application programs and corresponding translation paths are listed in order of fidelity, with an indicia identifying the preferred path. One of the translation paths is selected and the document is translated into the acceptable format. Following translation of the program, the application is launched and the newly translated document is opened.

Abstract: A method and apparatus for efficient allocation of temporary storage for performing accurate and correct numeric base conversions on a computer system is provided. Numeric base conversions are common because computers operate in binary whereas the values that are input into computers are based on a decimal system. A common source of error occurs when converted values are rounded. The intermediate arithmetic used to perform the conversion requires greater precision than the target floating point format. It is known that to always insure correctly rounded results, an extremely high precision intermediate arithmetic may be used. However, in many case this is a waste of system memory. To efficiently allocate system memory to this task, the most difficult rounding case is determined. The precision needed to correctly round the most difficult case is then derived. This information is then stored and subsequently used to allocate an efficient amount of storage whenever a numeric base conversion is to take place.

Abstract: A speech recognition system operating on a computer system, which uses a single speech recognizer for all of the currently running application programs and provides a way of efficiently determining the proper destination application program for recognized speech. The speech recognizer uses a language model formed from the merging of the language models from two or more application programs. The merged language model includes data values indicating which application program's language model was the source of the language model elements so that when those elements are recognized, recognition results can be directed to that application program.

Abstract: Protection of EHT and/or scan output stages in multiscan displays is provided without the use of additional components within the power supply other than those required to perform the power supply function itself. Operation is non-dissipative, conserving power. A drive control signal is AC coupled. The switch is on during retrace of the flyback pulse. The drive control signal is varied in accordance with the load, becoming active longer and longer periods of time with increasing load until the control signal vanishes (becomes continuously asserted), turning off the switch. In accordance with a further feature of the invention, feedback to a controlling integrated circuit concerning an overload condition may be achieved without dedicating a line or pin to a separate feedback signal.

Abstract: A method and apparatus for eliminating unnecessary address transitions on an DRAM address bus and DRAM write enable line. In a known DRAM controller and DRAM array, all address transitions on the CPU address bus are mirrored by address transitions on the DRAM address bus. The present invention eliminates all address transitions not associated with an actual DRAM access cycle by eliminating the DRAM controller's address multiplexer and replacing it with a multiplexing driver circuit and a bus holder circuit. In a similar fashion, a DRAM write enable circuit eliminates all transitions on the DRAM write enable line that are not associated with actual DRAM access cycles. Although specifically discussed in terms of a DRAM array and its associated circuitry, the portion of the present invention that reduces address transitions on the DRAM address lines could be used in any device currently using a multiplexer.

Abstract: Storage and access of compressed data via separately compressed and stored fixed size logical blocks. An original uncompressed data file is divided into fixed-size logical blocks and then separately compressed thus resulting in a compressed block of data of a generally known maximum size according to a compression ratio known in advance of the actual compression. After the uncompressed fixed-size logical block has been compressed into a maximum fixed-size logical block it is stored into space allocated to it. Furthermore, a table is built correlating the original uncompressed fixed-size logical block to the sectors allocated for each maximum fixed-size compressed logical block thus providing a mapping between the original uncompressed data file and the physical location on the storage device. Alternatively, because the compression ratio is known and because the size of the uncompressed fixed-size logical blocks is known, the resulting maximum size of the compressed logical blocks is generally known.

Abstract: A user interface and corresponding algorithms allow a user to resize an object by manipulating a handle. In particular, the interface provides a large handle which is clearly oriented to suggest a direction of movement merely by its appearance. Each handle is noticeably wider than its associated edge, and oriented towards the interior of the object to clarify that this object is active. If one handle is moved towards the other handle, at some point, the handles would come into contact with each other. Since each handle is noticeably wider than its associated edge, this potential collision may occur at some distance from either edge, possibly limiting the range of motion of the edge. At least one, and preferably both, handles are displaced along each handle's respective edge so that the handles do not collide and so each handle can be brought closer to the opposite edge.

Abstract: A technique is provided for very efficiently injecting DC current into a horizontal deflection yoke to achieve raster shifting. The DC current (which is bi-directional) is used to unbalance the scan current, thereby providing a means to shift the horizontal scan raster to the left and right. This ability makes it is possible to offset symmetry problems in the yoke and CRT gun system. The amount of current and the direction of the current is both user adjustable and system adjustable, and is controlled through a microcontroller. Preferably, the microcontroller uses an H-synchronized clock generated by an on-screen display (OSD) controller, thereby avoiding the need to separately generate a high frequency clock. Using a current switching approach, low power losses are achieved in a circuit that is low cost and requires few components.

Abstract: Improved method and apparatus for vector quantization (VQ) to build a codebook for the compression of data. The codebook or "tree" is initialized by establishing N initial nodes and creating the remainder of the codebook as a binary codebook. Children entries are split upon determination of various attributes, such as maximum distortion, population, etc. Vectors obtained from the data are associated with the children nodes, and then representative children entries are recalculated. This splitting/reassociation continues iteratively until a difference in error associated with the previous children and current children becomes less than a threshold. This splitting and reassociating process continues until the maximum number of terminal nodes is created in the tree, a total error or distortion threshold has been reached or some other criterion. The data may then be transmitted as a compressed bitstream comprising a codebook and indices referencing the codebook.

Abstract: A battery cell having a positive terminal, a negative terminal and a power producing core section (e.g., electrolyte) for systems, such as computer systems, cellular phones, etc. The battery cell also includes an internal circuit to monitor the state of the battery cell. The state that is monitored may include the temperature, charge level of the battery core section, the discharge/charge rate. The circuit may control the battery cell (e.g., cause charging of the battery cell). This internal circuit may be an integrated circuit, such as a microprocessor.