Abstract: Embodiments include a real time etch rate sensor and methods of for using a real time etch rate sensor. In an embodiment, the real time etch rate sensor includes a resonant system and a conductive housing. The resonant system may include a resonating body, a first electrode formed over a first surface of the resonating body, a second electrode formed over a second surface of the resonating body, and a sacrificial layer formed over the first electrode. In an embodiment, at least a portion of the first electrode is not covered by the sacrificial layer. In an embodiment, the conductive housing may secure the resonant system. Additionally, the conductive housing contacts the first electrode, and at least a portion of an interior edge of the conductive housing may be spaced away from the sacrificial layer.

Abstract: Embodiments of the invention generally provide a process kit for use in a physical deposition chamber (PVD) chamber. In one embodiment, the process kit provides adjustable process spacing, centering between the cover ring and the shield, and controlled gas flow between the cover ring and the shield contributing to uniform gas distribution, which promotes greater process uniformity and repeatability along with longer chamber component service life.

Abstract: The present disclosure provides forming nanostructures with precision dimension control and minimum lithographic related errors for features with dimension under 14 nanometers and beyond. A self-aligned multiple spacer patterning (SAMSP) process is provided herein and the process utilizes minimum lithographic exposure process, but rather multiple deposition/etching process to incrementally reduce feature sizes formed in the mask along the manufacturing process, until a desired extreme small dimension nanostructures are formed in a mask layer.

Abstract: Methods for depositing a metal film comprising forming an amorphous silicon layer as a nucleation layer and/or glue layer on a substrate. Some embodiments further comprise the incorporation of a glue layer to increase the ability of the amorphous silicon layer and metal layer to stick to the substrate.

Abstract: Embodiments include devices and methods for detecting particles, monitoring etch or deposition rates, or controlling an operation of a wafer fabrication process. In an embodiment, one or more micro sensors are mounted on wafer processing equipment, and are capable of measuring material deposition and removal rates in real-time. The micro sensors are selectively exposed such that a sensing layer of a micro sensor is protected by a mask layer during active operation of another micro sensor, and the protective mask layer may be removed to expose the sensing layer when the other micro sensor reaches an end-of-life. Other embodiments are also described and claimed.

Abstract: The present disclosure provides a substrate support assembly includes a substrate pedestal having an upper surface for receiving and supporting a substrate, a cover plate disposed on the substrate support pedestal, and two or more lift pins movably disposed through the substrate support pedestal and the cover plate. The cover plate includes a disk body having a central opening. The two or more lift pins are self supportive. Each of the two or more lift pins comprises one or more contact pads, and the contact pads of the lift pins extend into to the central opening of the cover plate to receive and support a substrate at an edge region of the substrate.

Abstract: An article such as a susceptor includes a body of a thermally conductive material coated by a first protective layer and a second protective layer over a surface of the body. The first protective layer is a thermally conductive ceramic. The second protective layer covers the first protective layer and is a plasma resistant ceramic thin film that is resistant to cracking at temperatures of 650 degrees Celsius.

Abstract: Methods and apparatus for processing substrates are provided. In some embodiments, methods of processing substrates includes: (a) providing a process gas comprising a polymer-forming gas and an etching gas between a first electrode and a second electrode within the processing volume, wherein the first electrode is opposite the second electrode; (b) applying a first voltage waveform from a first RF power source to the second electrode to form a plasma from the process gas, wherein the plasma has a first ion energy to deposit a polymer layer directly atop a dielectric layer of the substrate; and (c) adjusting the first voltage waveform to a second voltage waveform to increase an ion energy of the plasma from the first ion energy to a second ion energy, wherein the plasma at the second ion energy ceases to deposit the polymer layer and proceeds to etch the polymer layer and the dielectric layer.

Abstract: Gas distribution assemblies are described including an annular body, an upper plate, and a lower plate. The upper plate may define a first plurality of apertures, and the lower plate may define a second and third plurality of apertures. The upper and lower plates may be coupled with one another and the annular body such that the first and second apertures produce channels through the gas distribution assemblies, and a volume is defined between the upper and lower plates.

Abstract: Embodiments of the present disclosure relate to an apparatus and a method for reducing the adverse effects of exposing portions of an integrated circuit (IC) device to various forms of radiation during one or more operations found within the IC formation processing sequence by controlling the environment surrounding and temperature of an IC device during one or more parts of the IC formation processing sequence. The provided energy may include the delivery of radiation to a surface of a formed or a partially formed IC device during a deposition, etching, inspection or post-processing process operation. In some embodiments of the disclosure, the temperature of the substrate on which the IC device is formed is controlled to a temperature that is below room temperature (e.g., <20° C.) during the one or more parts of the IC formation processing sequence.

Abstract: Exemplary cleaning or etching methods may include flowing a fluorine-containing precursor into a remote plasma region of a semiconductor processing chamber. Methods may include forming a plasma within the remote plasma region to generate plasma effluents of the fluorine-containing precursor. The methods may also include flowing the plasma effluents into a processing region of the semiconductor processing chamber. A substrate may be positioned within the processing region, and the substrate may include a region of exposed oxide. Methods may also include providing a hydrogen-containing precursor to the processing region. The methods may further include removing at least a portion of the exposed oxide while maintaining a relative humidity within the processing region below about 50%. Subsequent to the removal, the methods may include increasing the relative humidity within the processing region to greater than or about 50%. The methods may further include removing an additional amount of the exposed oxide.

Abstract: Processing methods may be performed to form recesses in a semiconductor substrate. The methods may include oxidizing an exposed silicon nitride surface on a semiconductor substrate within a processing region of a semiconductor processing chamber. The methods may include forming an inert plasma within the processing region of the processing chamber. Effluents of the inert plasma may be utilized to modify the oxidized silicon nitride. A remote plasma may be formed from a fluorine-containing precursor to produce plasma effluents. The methods may include flowing the plasma effluents to the processing region of the semiconductor processing chamber. The methods may also include removing the modified oxidized silicon nitride from the semiconductor substrate.

Abstract: Processing methods may be performed to remove unwanted materials from a substrate, such as an oxide footing. The methods may include forming an inert plasma within a processing region of a processing chamber. Effluents of the inert plasma may be utilized to modify a surface of an exposed material on a semiconductor substrate within the processing region of the semiconductor chamber. A remote plasma may be formed from a fluorine-containing precursor to produce plasma effluents. The methods may include flowing the plasma effluents to the processing region of the semiconductor processing chamber. The methods may also include removing the modified surface of the exposed material from the semiconductor substrate.

Abstract: Exemplary methods for removing cobalt material may include flowing a chlorine-containing precursor into a processing region of a semiconductor processing chamber. The methods may include forming a plasma of the chlorine-containing precursor to produce plasma effluents. The methods may also include contacting an exposed region of cobalt with the plasma effluents. The exposed region of cobalt may include an overhang of cobalt on a trench defined on a substrate. The plasma effluents may produce cobalt chloride at the overhang of cobalt. The methods may include flowing a nitrogen-containing precursor into the processing region of the semiconductor processing chamber. The methods may further include contacting the cobalt chloride with the nitrogen-containing precursor. The methods may also include recessing the overhang of cobalt.

Abstract: Apparatus and methods for processing substrates are disclosed. In some embodiments, a substrate processing system includes: a process chamber defining an interior volume for receiving a substrate and having a plasma forming zone, a substrate support positioned within the interior volume, a resonator coil disposed proximate the plasma forming zone, and a resonant inductor tuning circuit configured to vary an RF feed point location along the resonator coil. A method of operating a substrate processing system, according to embodiments, includes: transferring a substrate to a substrate support disposed within an interior volume of a processing chamber, the interior volume having a plasma forming zone, and operating a resonant inductor tuning circuit to couple an RF power source to a first RF feed point of a plurality of RF feed points along a resonator coil disposed proximate the plasma forming zone.

Abstract: A method is provided for forming a stack of film layers for use in 3D memory devices. The method starts with providing a substrate in a processing chamber of a deposition reactor. Then one or more process gases suitable for forming a dielectric layer are supplied into the processing chamber of the deposition reactor forming a dielectric layer on the substrate. Then one or more process gases suitable for forming a metallic layer are supplied into the processing chamber of the deposition reactor forming a metallic layer on the dielectric layer. Then one or more process gases suitable for forming a metallic nitride adhesion layer are supplied into the processing chamber of the deposition reactor forming a metallic nitride adhesion layer on the metallic layer. The sequence is then repeated to form a desired number of layers.

Abstract: A method of manufacturing an article comprises providing an article. An ion assisted deposition (IAD) process is performed to deposit a second protective layer over a first protective layer. The second protective layer is a plasma resistant rare earth oxide having a thickness of less than 50 microns and a porosity of less than 1%. The second protective layer seals a plurality of cracks and pores of the first protective layer.

Abstract: Implementations of the present disclosure relate to an electrode assembly for a processing chamber. In one implementation, the electrode assembly includes a cathode electrode having an inner volume and a ground anode electrode spaced apart from the cathode electrode. A first etchant gas is introduced through the cathode electrode and into the inner volume. The first etchant gas is ionized within the inner volume. The ionized first etchant gas is filtered to allow only radicals to flow from the inner volume into a mixing volume formed within the ground anode electrode. The mixing volume is separated from the inner volume by a gas injection ring. The radicals from the first etchant gas are mixed and reacted with a second etchant gas in molecular phase, which is introduced through the ground anode electrode into a sidewall of the gas injection ring before entering the mixing volume in an evenly distributed manner.

Abstract: A vacuum process chamber component comprising two separate pieces with an o-ring between the pieces and solder bonded together is described. The component may be an electrostatic chuck comprising a ceramic electrostatic puck and a metal baseplate with at least one o-ring therebetween and joined by a solder bond is described. Methods of making and using vacuum process chamber component are also described.