Abstract: An integrated thermal unit comprises a bake station comprising a bake plate configured to hold and heat a substrate; a chill station comprising a chill plate configured to hold and cool a substrate; and a substrate transfer shuttle configured to transfer substrates from the bake plate to the chill plate along a horizontally linear path within the thermal unit and raise and lower substrates along a vertical path within the integrated thermal unit.

Abstract: An integrated thermal unit comprising a bake plate configured to heat a substrate supported on a surface of the bake plate; a chill plate configured to cool a substrate supported on a surface of the chill plate; and a substrate transfer shuttle configured to transfer substrates from the bake plate to the cool plate, wherein the substrate transfer shuttle has a temperature controlled substrate holding surface that is capable of cooling a substrate heated by the bake plate.

Abstract: Method and apparatus for obtaining a tailored heat transfer profile in a chamber housing a microprocessor manufacturing process, including estimating heat transfer properties of the chamber; estimating heat absorptive properties of a wafer; adjusting the physical characteristics of the chamber to correct the heat transfer properties; and utilizing the chamber for manufacturing microprocessors.

Abstract: An electron flood apparatus 1 of the present invention comprises a chamber 22 having a first part 22a made of conductive material and a second part 22b made of insulating material, and extending along a predefined closed curve Ax. A coil 18 is provided outside the first part 22a to generate a magnetic field in a direction intersecting with the surface formed by the predefined closed curve Ax. The coil 18 and the chamber 22 are inductively coupled by the magnetic field. Since the inert gas plasma is generated in the chamber 22 mainly by inductive coupling, electrons contained in the plasma have a low energy. Here, by applying voltage to an electrode 21, electrons having a low energy in the chamber 22 are emitted from an opening 14.

Abstract: Systems and methods for electrochemically processing. A contact element defines a substrate contact surface positionable in contact a substrate during processing. In one embodiment, the contact element comprises a wire element. In another embodiment the contact element is a rotating member. In one embodiment, the contact element comprises a noble metal.

Abstract: A method is provided for processing a substrate including providing a processing gas comprising an organosilicon compound comprising a phenyl group to the processing chamber, and reacting the processing gas to deposit a low k silicon carbide barrier layer useful as a barrier layer in damascene or dual damascene applications with low k dielectric materials.

Abstract: We have developed a method of PECVD depositing a-SiNx:H films which are useful in a TFT device as gate dielectric and passivation layers, when a series of TFT devices are arrayed over a substrate having a surface area larger than about 1 m2, which may be in the range of about 4.1 m2, and even as large as 9 m2. The a-SiNx:H films provide a uniformity of film thickness and uniformity of film properties, including chemical composition, which are necessary over such large substrate surface areas. The films produced by the method are useful for both liquid crystal active matrix displays and for organic light emitting diode control.

Abstract: A method of processing a semiconductor workpiece. The method includes flowing a process gas to a semiconductor workpiece through a first plurality of orifices positioned in a gas distribution faceplate. The method also includes removing gas from over the semiconductor workpiece through a chamber exhaust port and a second plurality of orifices positioned in the gas distribution faceplate.

Abstract: An integrated etch process, for example as used for etching an anti-reflection layer and an underlying aluminum layer, in which the chamber wall polymerization is controlled by coating polymer onto the sidewall by a plasma deposition process prior to inserting the wafer into the chamber, etching the structure, and after removing the wafer from the chamber, plasma cleaning the polymer from the chamber wall. The process is process is particularly useful when the etching is performed in a multi-step process and the polymer is used for passivating the etched structure, for example, a sidewall in an etched structure and in which the first etching step deposits polymer and the second etching step removes polymer. The controlled polymerization eliminates interactions of the etching with the chamber wall material, produces repeatable results between wafers, and eliminates in the etching plasma instabilities associated with changing wall conditions.

Abstract: A method is provided wherein a gate dielectric film that is plasma nitrided in a chamber of one system is subsequently heated or “annealed” in another chamber of the same system. Processing delay can be controlled so that all wafers processed in the system experience similar nitrogen content.

Abstract: A plasma display panel including a low k dielectric layer. In one embodiment, the dielectric layer is comprises a fluorine-doped silicon oxide layer such as an SiOF layer. In another embodiment, the dielectric layer comprises a Black Diamond™ layer. In certain embodiments, a capping layer such as SiN or SiON is deposited over the dielectric layer.

Abstract: High flows of low-mass fluent gases are used in an HDP-CVD process for gapfill deposition of a silicon oxide film. An enhanced turbomolecular pump that provides a large compression ratio for such low-mass fluent gases permits pressures to be maintained at relatively low levels in a substrate processing chamber, thereby improving the gapfill characteristics.

Abstract: A deposition/etching/deposition process is provided for filling a gap in a surface of a substrate. A liner is formed over the substrate so that distinctive reaction products are formed when it is exposed to a chemical etchant. The detection of such reaction products thus indicates that the portion of the film deposited during the first etching has been removed to an extent that further exposure to the etchant may remove the liner and expose underlying structures. Accordingly, the etching is stopped upon detection of distinctive reaction products and the next deposition in the deposition/etching/deposition process is begun.

Abstract: A retuning process particularly useful with an Ar/H2 smoothing anneal by rapid thermal processing (RTP) of a silicon-on-insulator (SOI) wafer performed after cleavage. The smoothing anneal or other process is optimized including a radial temperature profile accounting for the edge ring and exclusion zone and the vertically structured SOI stack or other wafer gross structure. The optimized smoothing conditions are used to oxidize a bare silicon wafer and a reference thickness profile obtained from it is archived. After extended processing of complexly patterned production wafers, another bare wafer is oxidized and its monitor profile is compared to the reference profile, and the production process is adjusted accordingly. In another aspect, a jet of cooling gas is preferentially directed to the edge ring and peripheral portions of the supported SOI wafer to cool them relative to the inner wafer portions.

Abstract: The polishing pad for a chemical mechanical polishing apparatus, and a method of making the same. The polishing pad has a covering layer with a polishing surface and a backing layer which is adjacent to the platen. A first opening in the covering layer with a first cross-sectional area and a second opening in the backing layer with a second, different cross-sectional area form an aperture through the polishing pad. A substantially transparent polyurethane plug is positioned in the aperture, and an adhesive material fixes the plug in the aperture.

Abstract: A compound that includes at least Si, N and C in any combination, such as compounds of formula (R—NH)4-nSiXn wherein R is an alkyl group (which may be the same or different), n is 1, 2 or 3, and X is H or halogen (such as, e.g., bis-tertiary butyl amino silane (BTBAS)), may be mixed with silane or a silane derivative to produce a film. A polysilicon silicon film may be grown by mixing silane (SiH4) or a silane derviative and a compound including Si, N and C, such as BTBAS. Films controllably doped with carbon and/or nitrogen (such as layered films) may be grown by varying the reagents and conditions.

Abstract: A flexible semiconductor test structure that may be incorporated into a semiconductor device is provided. The test structure may include a plurality of test pads designed to physically stress conductive lines to which they are attached during thermal cycling. By utilizing test pads with different dimensions (lengths and/or widths), the effects of thermal stress generated by a plurality of conductive lines having corresponding different dimensions may be simulated.

Abstract: A method of measuring a physical characteristic of a patterned substrate comprises determining a wavelength where a first reflectance from a patterned substrate equals a second reflectance from the patterned substrate. The first and second reflectances are generated from substrate regions having different pattern densities. A physical characteristic value that is associated with the determined wavelength is identified. The value identification may be done by looking up the determined wavelength in a database, for example by referring to a graph.

Abstract: A method of forming a polishing pad with a polishing layer having a polishing surface and a back surface. A plurality of grooves are formed on the polishing surface, and an indentation is formed in the back surface of the polishing layer. A region on the polishing surface corresponding to the indentation in the back surface is free of grooves or has shallower grooves.

Abstract: An apparatus for processing substrates is disclosed. In one embodiment, the apparatus includes a housing and a plurality of stacked cell structures in the housing. An actuator is adapted to move the plurality of stacked cell structures inside of the housing while substrates in the stacked cell structures are being heated.