Abstract: Methods and systems for dynamically incorporating advertising content into multimedia environments, such as games, are provided. Example embodiments include a dynamic inserter, which selects content, based upon a set of criteria, to deliver to a receiving client system, such as a game client. The game client typically dynamically determines locations with the game where advertisements may be inserted. Associated with these locations are ad tags that specify criteria for the ads. For example, the criteria may include ad type, ad genre, and scheduling information. The game client then sends indications of these ad tags to the dynamic inserter to be used to select appropriate ads. The dynamic inserter selects ads based upon the criteria and sends them to the game client, which selects them for ad tags with conforming criteria. The game client then renders the selected ad in the appropriate location.

Abstract: Methods and Systems for securely distributing software in a subscription-based environment are provided. In an example embodiment, a Game Security Facility (“GSF”) associated with a game server is used to manage secure communications with game clients. The GSF typically manages secure communication of the accounting and billing information and secure communication of game session data. In typical operation, the game client generates a pass-phrase that transparently includes a unique identifier of the machine upon which the subscription software will reside. RSA-type key pairs that are then generated using this pass-phrase will be associated uniquely with both the game player and with the machine upon which the software resides, thus preventing unauthorized copying to another machine or unauthorized use by a third party.

Abstract: A method and system for monitoring performance of an input/output (“I/O”) processor in a server associated with a computing system, such as an intelligent I/O (“I2O”) compliant computer system. A virtual adapter in the I/O processor monitors messages passing through the I/O processor to produce message data. An I/O monitor associated with each server in the computing system constructs a server communications model for its respective server using the message data provided by each of the virtual adapters associated with the I/O processors in the server. The I/O monitor may also collect information regarding non-I2O devices. An I/O user interface builds a computing system communications model using the server communications models provided by the respective I/O monitors in each of the computing system's servers.

Abstract: A system for testing an embedded system containing a target processor executing a target program and target hardware that may be partially physical and partially simulated. A target monitor determines when the target processor is attempting to access the simulated hardware. This determination is made by monitoring the address bus of the microprocessor to detect an address in the address space of the simulated hardware. An attempt to access the simulated hardware may also be detected by detecting the lack of an acknowledge signal from the physical hardware within a predetermined period after the target processor attempts to access the target hardware. In the event of an access to the simulated hardware, a bus capture circuit captures output signals on the bus connections of the target processor and converts the output signals to output data. The output data is then coupled through a communications interface to a hardware simulator.

Abstract: A method and apparatus for producing a plurality of unique instrumentation tags for testing and debugging a computer program. The tags have a value equal to the combination of an offset and a base. The value for a tag offset is first determined. The tag is then inserted into an area of interest within the source code being instrumented. The base value is set when the object code for the computer program is linked to form executable code. The base value is resolved such that each tag has a unique value in comparison with any other tag. The source code being instrumented with tagging statements can reside on more than one computer. Moreover, the instrumented source code can be compiled on more than one computer. The unique value associated with each tagging statement is recorded in an instrumentation database, which facilitates observation of the instrumented program during its execution.

Abstract: A source-level run-time software code debugging instrument (10) includes target access probe ("TAP") (12) and communications adapter ("COMDAP") (14) that process emulation commands provided by source-level debugging software operating on a host computer. The TAP includes a TAP CPU (28) that receives target CPU input signals and delivers target CPU output signals for controlling the execution of software code by the target circuit in accordance with command signals provided by the host computer. The TAP also includes programmable logic cell array (24) and RAM (34). The TAP logic cell array routes command and data signals to and from the TAP CPU, and the RAM stores an in-circuit emulation ("ICE") program used by the TAP to operate the target circuit. The COMDAP is physically separate from the TAP and provides an interface between the host computer and the TAP. The COMDAP includes a programmable logic cell array (44) and an EPROM (46).

Abstract: A source-level run-time software code debugging instrument (10) includes a target access probe ("TAP") (12) and a communications adapter ("COMDAP") (14) that process emulation commands provided by source-level debugging software operating on a host computer. The TAP includes a TAP CPU (28) that receives target CPU input signals and delivers target CPU output signals for controlling the execution of software code by the target circuit in accordance with command signals provided by the host computer. The TAP also includes a programmable logic cell array (24) and a RAM (34). The TAP logic cell array routes command and data signals to and from the TAP CPU, and the RAM stores an in-circuit emulation ("ICE") program used by the TAP to operate the target circuit. The COMDAP is physically separate from the TAP and provides an interface between the host computer and the TAP. The COMDAP includes a programmable logic cell array (44) and an EPROM (46).

Abstract: An electrical connector (10) provides mechanical coupling and electrical contact between the multiple wires (12) of a flat cable assembly (14) and multiple electrically conductive pads (18) of a printed circuit board (16). The electrical connector includes a substantially rigid electrically nonconductive spacing element (30) having first and second opposed side margins (32 and 34) that include respective comb-like portions (35a and 35b) shaped in alternating tabs (36) and slots (40). The slots and tabs are adapted to respectively receive and hold in spaced-apart relation the wires of the flat cable assembly. A resilient material (42) that is electrically conductive in directions only substantially parallel to a conduction axis (44) is secured between the substrate and the spaced-apart wires held by the spacing element. The resilient material provides multiple separate electrically conductive pathways between the wires and the conductive pads.

Abstract: A first process is used to identify the second circuit to which the shorted circuit is connected. A low-level, A.C. potential is imposed between the node known to be shorted and a common trace. A high impedance probe is scanned over the circuits at a distance. The potential detected is filtered and compared with the impressed potential. The result is filtered, amplified, and synchronously demodulated and the result displayed.The second process is used to locate the site of the short. A low-level AC current is injected between two shorted traces. Points along the traces are contacted by a high impedance probe. The signal is filtered and compared with the impressed potential. The result of the comparison is further filtered, amplified, synchronously demodulated and the result displayed.A shorts locator is under the control of a central processing unit. Clips permit connection to the system under test. The clip potentials are monitored.

Abstract: A device and process for identifying signals in microprocessors-based circuits includes a probe, a display a target interface and a control system based on a similar microprocessor. Sets of signal patterns are impressed on lines in the target system. The patterns are selected so as to create unique signatures for all data lines, address lines, control lines, combinations of control lines and their complements. To associate the node with a data line, a signal pattern is written to a single address in the target system. After the pattern is impressed the signature of the response is compared with a table of responses that would be expected. If it is not identified, then the target system is subjected to a series of read functions. The address from which the data is read is determined by a second stimulus pattern. After the read operations, the signature of the response at the node is compared with expected signatures.